參數(shù)資料
型號: AT32UC3C2512C-A2ZT
廠商: Atmel
文件頁數(shù): 106/109頁
文件大小: 0K
描述: IC MCU 32BIT 512KB FLASH 64TQFP
標準包裝: 800
系列: AVR®32 UC3 C
核心處理器: AVR
芯體尺寸: 32-位
速度: 66MHz
連通性: CAN,以太網(wǎng),I²C,IrDA,LIN,SPI,UART/USART,USB
外圍設備: 欠壓檢測/復位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 45
程序存儲器容量: 512KB(512K x 8)
程序存儲器類型: 閃存
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉換器: A/D 11x12b,D/A 2x12b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 托盤
96
9166DS–AVR-01/12
AT32UC3C
10. Errata
10.1
rev E
10.1.1
ADCIFA
1
ADCREFP/ADCREFN can not be selected as an external ADC reference by setting the
ADCIFA.CFG.EXREF bit to one
Fix/Workaround
A vo lt ag e r e f e r e n c e ca n b e a p p lie d on A D CREFP/ADC REFN pins if the
ADCIFA.CFG.EXREF bit is set to zero, the ADCIFA.CFG.RS bit is set to zero and the volt-
age reference applied on ADCREFP/ADCREFN pins is higher than the internal 1V
reference.
10.1.2
AST
1
AST wake signal is released one AST clock cycle after the BUSY bit is cleared
After writing to the Status Clear Register (SCR) the wake signal is released one AST clock
cycle after the BUSY bit in the Status Register (SR.BUSY) is cleared. If entering sleep mode
directly after the BUSY bit is cleared the part will wake up immediately.
Fix/Workaround
Read the Wake Enable Register (WER) and write this value back to the same register. Wait
for BUSY to clear before entering sleep mode.
10.1.3
aWire
1
aWire MEMORY_SPEED_REQUEST command does not return correct CV
The aWire MEMORY_SPEED_REQUEST command does not return a CV corresponding to
the formula in the aWire Debug Interface chapter.
Fix/Workaround
Issu e
a
d u m m y
r e a d
to
a d d r es s
0 x 10 00 00 00 0
be for e
issu in g
th e
MEMORY_SPEED_REQUEST command and use this formula instead:
10.1.4
Power Manager
1
TWIS may not wake the device from sleep mode
If the CPU is put to a sleep mode (except Idle and Frozen) directly after a TWI Start condi-
tion, the CPU may not wake upon a TWIS address match. The request is NACKed.
Fix/Workaround
When using the TWI address match to wake the device from sleep, do not switch to sleep
modes deeper than Frozen. Another solution is to enable asynchronous EIC wake on the
TWIS clock (TWCK) or TWIS data (TWD) pins, in order to wake the system up on bus
events.
fsab
7
faw
CV 3
-----------------
=
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