參數(shù)資料
型號: AS3517
廠商: ams
文件頁數(shù): 68/94頁
文件大小: 0K
描述: IC CODEC AFE AUDIO STER 81-CTBGA
標(biāo)準(zhǔn)包裝: 250
類型: 音頻編解碼器
應(yīng)用: 便攜式音頻,電話
安裝類型: 表面貼裝
封裝/外殼: 81-TFBGA
供應(yīng)商設(shè)備封裝: 81-CTBGA(9x9)
包裝: 托盤
AS3517 V17
Data Sheet, Confidential
2003-2007, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.
www.austriamicrosystems.com
Table 67 PWM Register
Name
Base
Default
PWM
2-wire serial
00h
PWM Output Control Register
Offset: 12h-3
Sets the PWM output duty cycle and signal polarity.
This is an extended register and needs to be enabled by writing 011b to Reg. 18h first.
This register is reset at a DVDD-POR.
Bit
Bit Name
Default
Access
Bit Description
7
PWM_INVERTED
0
R/W
PWM output polarity
0: not inverted
1: inverted
6:0
PWM_CYCLE
0000000
R/W
Sets the PWM duty cycle
Duty Cycle = PWM_CYCLE * 0.3937%
PWM_CYCLE = 0 means no pulse
Table 68 AudioSet_1 Register
Name
Base
Default
AudioSet_1
2-wire serial
00h
First Audio Set Register
Offset: 14h
Powers the various audio inputs and outputs UP or DOWN.
Attention: This control register resets and holds microphone, line out, and ADC related
registers in reset. After activation the required register settings need to be re-
programmed.
This register is reset at a DVDD-POR.
Bit
Bit Name
Default
Access
Bit Description
7
ADC_R_ON
0
R/W
0: ADC right channel powered down
1: ADC right channel enabled for recording
6
ADC_L_ON
0
R/W
0: ADC left channel powered down
1: ADC left channel enabled for recording
5
LOUT2_ON
0
R/W
0: Line output 2 powered down
1: Line output enabled
4
LOUT1_ON
0
R/W
0: Line output 1 powered down
1: Line output enabled
3
LIN2_ON
0
R/W
0: Line input 2 powered down
1: Line input 2 enabled
2
LIN1_ON
0
R/W
0: Line input 1 powered down
1: Line input 1 enabled
1
MIC2_ON
0
R/W
0: Microphone input 2 powered down
1: Microphone input 1 enabled
0
MIC1_ON
0
R/W
0: Microphone input 1 powered down
1: Microphone input 1 enabled
Revision 1v3
69
- 93
ams
AG
Technical
content
still
valid
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