ProASICPLUS Flash Family FPGAs v5.9 4-7 Advance v0.6 (continued) The "Calcu" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� APA750-FGG896
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 85/178闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA PROASIC+ 750K 896-FBGA
妯欐簴鍖呰锛� 27
绯诲垪锛� ProASICPLUS
RAM 浣嶇附瑷堬細 147456
杓稿叆/杓稿嚭鏁�(sh霉)锛� 562
闁€鏁�(sh霉)锛� 750000
闆绘簮闆诲锛� 2.3 V ~ 2.7 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� 0°C ~ 70°C
灏佽/澶栨锛� 896-BGA
渚涙噳鍟嗚ō鍌欏皝瑁濓細 896-FBGA锛�31x31锛�
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�绗�25闋�绗�26闋�绗�27闋�绗�28闋�绗�29闋�绗�30闋�绗�31闋�绗�32闋�绗�33闋�绗�34闋�绗�35闋�绗�36闋�绗�37闋�绗�38闋�绗�39闋�绗�40闋�绗�41闋�绗�42闋�绗�43闋�绗�44闋�绗�45闋�绗�46闋�绗�47闋�绗�48闋�绗�49闋�绗�50闋�绗�51闋�绗�52闋�绗�53闋�绗�54闋�绗�55闋�绗�56闋�绗�57闋�绗�58闋�绗�59闋�绗�60闋�绗�61闋�绗�62闋�绗�63闋�绗�64闋�绗�65闋�绗�66闋�绗�67闋�绗�68闋�绗�69闋�绗�70闋�绗�71闋�绗�72闋�绗�73闋�绗�74闋�绗�75闋�绗�76闋�绗�77闋�绗�78闋�绗�79闋�绗�80闋�绗�81闋�绗�82闋�绗�83闋�绗�84闋�鐣跺墠绗�85闋�绗�86闋�绗�87闋�绗�88闋�绗�89闋�绗�90闋�绗�91闋�绗�92闋�绗�93闋�绗�94闋�绗�95闋�绗�96闋�绗�97闋�绗�98闋�绗�99闋�绗�100闋�绗�101闋�绗�102闋�绗�103闋�绗�104闋�绗�105闋�绗�106闋�绗�107闋�绗�108闋�绗�109闋�绗�110闋�绗�111闋�绗�112闋�绗�113闋�绗�114闋�绗�115闋�绗�116闋�绗�117闋�绗�118闋�绗�119闋�绗�120闋�绗�121闋�绗�122闋�绗�123闋�绗�124闋�绗�125闋�绗�126闋�绗�127闋�绗�128闋�绗�129闋�绗�130闋�绗�131闋�绗�132闋�绗�133闋�绗�134闋�绗�135闋�绗�136闋�绗�137闋�绗�138闋�绗�139闋�绗�140闋�绗�141闋�绗�142闋�绗�143闋�绗�144闋�绗�145闋�绗�146闋�绗�147闋�绗�148闋�绗�149闋�绗�150闋�绗�151闋�绗�152闋�绗�153闋�绗�154闋�绗�155闋�绗�156闋�绗�157闋�绗�158闋�绗�159闋�绗�160闋�绗�161闋�绗�162闋�绗�163闋�绗�164闋�绗�165闋�绗�166闋�绗�167闋�绗�168闋�绗�169闋�绗�170闋�绗�171闋�绗�172闋�绗�173闋�绗�174闋�绗�175闋�绗�176闋�绗�177闋�绗�178闋�
ProASICPLUS Flash Family FPGAs
v5.9
4-7
Advance v0.6
(continued)
The "Nominal Supply Voltages鈥� section was updated.
1-34
The "Pin Description" section has been updated.
Advance v0.5
The description for the VPN pin has changed.
Advance v0.4
The "Plastic Device Resources" section has been updated.
ii
Controller State Diagram have been updated.
The "Output Buffer Delays" section has been updated.
The "Input Buffer Delays" section has been updated.
The "456-Pin PBGA" section has been updated.
The "676-Pin FBGA" section has been updated.
Advance v0.3
The "Plastic Device Resources" section has been updated.
ii
WDATA has ben changed to DI, and RDATA has been changed to DO to make them consistent
with the signal names found in the Macro Library Guide.
have been updated.
and 2-23
updated.
and 2-42
The table in the "Package Thermal Characteristics" section has been updated.
The "Nominal Supply Voltages鈥� section has been updated.
1-34
Tables 5, 6, and 7 from Advanced v0.3 were removed.
Previous version
Changes in current version (v5.9)
Page
鐩搁棞PDF璩囨枡
PDF鎻忚堪
HSC49DRYN-S93 CONN EDGECARD 98POS DIP .100 SLD
A3PE3000L-FGG484I IC FPGA 1KB FLASH 3M 484-FBGA
170-015-172L000 CONN DB15 CRIMP MALE TIN
HSC49DRYH-S93 CONN EDGECARD 98POS DIP .100 SLD
170-037-172L030 CONN DB37 CRIMP MALE TIN
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