8
Biasing and Operation
The recommended DC bias
condition for the AMMC-5040 is
with all four drains connected to
a single 4.5V supply and all four
gates connected to an adjustable
negative voltage supply as shown
in Figure 15. The gate voltage is
adjusted for a total drain supply
current of typically 300 mA.
Figures 1–12 can be used to help
estimate the minimum drain
voltage and current necessary for
a given RF gain and output power.
As shown in Figure 13, the
second, third, and fourth stage
DC drain bias lines are con-
nected internally and therefore
require only a single bond wire.
An additional bond wire is
needed for the first stage DC
drain bias, Vd1.
Only the third and fourth stage
DC gate bias lines are connected
internally. A total of three DC
gate bond wires are required: one
for Vg1, one for Vg2, and one for
the Vg3/Vg4 connection. The
internal matching circuitry at the
RF input creates a 50-ohm DC
and RF path to ground. A block-
ing capacitor should be used at
the RF input. Any DC voltage
applied to the RF input must be
maintained below 1V. The RF
output is AC coupled. No ground
bond wires are needed since the
ground connection is made by
means of plated through via
holes to the backside of the chip.
Frequency Multiplier Biasing
and Operation
The AMMC-5040 can also be used
as a frequency doubler, tripler or
quadrupler.
As a frequency doubler, the
AMMC-5040 provides conversion
gain for input signals in the
10–23 GHz frequency range for
output frequencies of 20–46 GHz.
Similarly, 5–10 GHz signals can
be quadrupled up to 20–40 GHz
with some conversion loss.
Optimum conversion efficiency
as a doubler is obtained with an
input power level of 3– 8 dBm.
For use as a frequency tripler, an
input power level of 14–16 dBm
is recommended.
Frequency multiplication is
achieved by reducing the bias on
the first stage FET to efficiently
generate harmonics. The remain-
ing three stages are then used to
provide amplification.
While many bias schemes may be
used to generate and amplify the
desired harmonics within the
AMMC-5040, the following
information is suggested as a
starting point for multiplier
applications.
Frequency doubling or quadru-
pling (generation of even har-
monics) is accomplished by
biasing the first stage FET at
pinch-off by setting Vg1 = Vp
≈ -1.1 volts. The remaining three
stages are biased for normal
amplification, e.g., Vgg is
adjusted such that Id2 + Id3 + Id4
≈ 250 mA. The drain voltage,
Vdd, for all four stages should be
3.5 – 4.5 volts. The assembly
diagram shown in Figure 16 can
be used as a guideline.
To operate the AMMC-5040 as a
frequency tripler (odd har-
monic), the device is biased as
shown in Figure 17. The drain
voltage for the first stage FET is
biased separately with Vd1
reduced to 1.1 - 1.2 volts. The
drain voltage for the remaining
three stages, Vd2, Vd3, and Vd4,
should be 3.5 - 4.5 volts. All four
gate voltages, Vgg, are set to
approximately –0.6 volts. If
desired, Vgg can be adjusted to
minimize second harmonics.
Improved multiplier performance
can be obtained by biasing both
the gate and drain voltages for
the first stage separately from
stages 2–4.
In all cases, Cb > 100 nF to
assure stability.
Assembly Techniques
The chip should be attached
directly to the ground plane
using either a fluxless AuSn
solder preform or electrically
conductive epoxy[1]. For conduc-
tive epoxy, the amount should be
just enough to provide a thin
fillet around the bottom perim-
eter of the die. The ground plane
should be free of any residue that
may jeopardize electrical or
mechanical attachment. Caution
should be taken to not exceed the
Absolute Maximum Rating for
assembly temperature and time.
Thermosonic wedge bonding is
the preferred method for wire
attachment to the bond pads. The
RF connections should be kept as
short as possible to minimize
inductance. Gold mesh[2] or
double-bonding with 0.7 mil gold
wire is recommended.
Mesh can be attached using a
2 mil round tracking tool and a
tool force of approximately
22 grams with an ultrasonic
power of roughly 55 dB for a
duration of 76
±8 mS. A guided
wedge at an ultrasonic power
level of 64 dB can be used for the
0.7 mil wire. The recommended
wire bond stage temperature is
150
± 2°C.
The chip is 100 mm thick and
should be handled with care.
This MMIC has exposed air
bridges on the top surface.
Handle at edges or with a custom