- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375306 > AM49BDS640AHD9I (SPANSION LLC) Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write PDF資料下載
參數(shù)資料
| 型號： | AM49BDS640AHD9I |
| 廠商： | SPANSION LLC |
| 元件分類： | 存儲器 |
| 英文描述： | Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA89 |
| 封裝： | 10 X 8 MM, FBGA-89 |
| 文件頁數(shù)： | 51/84頁 |
| 文件大小： | 763K |
| 代理商： | AM49BDS640AHD9I |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁當前第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁
December 5, 2003
Am49BDS640AH
49
A D V A N C E I N F O R M A T I O N
AC CHARACTERISTICS
Notes:
1. Figure shows total number of wait states set to seven cycles. The total number of wait states can be programmed from two
cycles to seven cycles.
2. If any burst address occurs at a 64-word boundary, two additional clock cycle are inserted, and is indicated by RDY
3. The device is in synchronous mode.
Figure 13.
CLK Synchronous Burst Mode Read (rising active CLK)
Notes:
1. Figure shows total number of wait states set to four cycles. The total number of wait states can be programmed from two
cycles to seven cycles. Clock is set for active falling edge.
2. If any burst address occurs at a 64-word boundary, two additional clock cycle are inserted, and is indicated by RDY
3. The device is in synchronous mode.
Figure 14.
CLK Synchronous Burst Mode Read (Falling Active Clock)
Da
Da + 1
Da + n
OE#
Data
Addresses
Aa
AVD#
RDY
CLK
CE#f
t
CES
t
ACS
t
AVC
t
AVD
t
ACH
t
OE
t
RACC
t
OEZ
t
CEZ
t
IACC
t
ACC
t
BDH
7 cycles for initial access shown.
Hi-Z
Hi-Z
Hi-Z
1
2
3
4
5
6
7
t
RDYS
t
BACC
t
CR
Da
Da + 1
Da + n
OE#
Data
Addresses
Aa
AVD#
RDY
CLK
CE#
t
CES
t
ACS
t
AVC
t
AVD
t
ACH
t
OE
t
OEZ
t
CEZ
t
IACC
t
ACC
t
BDH
4 cycles for initial access shown.
t
RACC
Hi-Z
Hi-Z
Hi-Z
1
2
3
4
5
t
RDYS
t
BACC
t
CR
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM49BDS640AHE8I | Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write |
| AM49BDS640AHE9I | Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write |
| AM49DL320BGT701 | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous |
| AM49DL320BGB701 | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous |
| AM49DL320BGB70IS | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM49BDS640AHE8I | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write |
| AM49BDS640AHE9I | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write |
| AM49DL3208G | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am49DL3208G - Stacked Multi-Chip Package (MCP) Flash Memory and pSRAM |
| AM49DL320BG | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am49DL320BG - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM49DL320BGB701 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。