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ADV7175/ADV7176
REV. A
–28–
APPE NDIX 4
RE GIST E R VALUE S
PAL (M)
Mode Register 0
Mode Register 1
Subcarrier Frequency Register 0
Subcarrier Frequency Register 1
Subcarrier Frequency Register 2
Subcarrier Frequency Register 3
Subcarrier Phase Register
T iming Register 0
Closed Captioning Ext Register 0
Closed Captioning Ext Register 1
Closed Captioning Register 0
Closed Captioning Register 1
T iming Register 1
Mode Register 2
Pedestal Control Register 0
Pedestal Control Register 1
Pedestal Control Register 2
Pedestal Control Register 3
Mode Register 3
06 Hex
00 Hex
A3 Hex
EF Hex
E6 Hex
21 Hex
00 Hex
08 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
PAL (N)
Mode Register 0
Mode Register 1
Subcarrier Frequency Register 0
Subcarrier Frequency Register 1
Subcarrier Frequency Register 2
Subcarrier Frequency Register 3
Subcarrier Phase Register
T iming Register 0
Closed Captioning Ext Register 0
Closed Captioning Ext Register 1
Closed Captioning Register 0
Closed Captioning Register 1
T iming Register 1
Mode Register 2
Pedestal Control Register 0
Pedestal Control Register 1
Pedestal Control Register 2
Pedestal Control Register 3
Mode Register 3
05 Hex
00 Hex
CB Hex
8A Hex
09 Hex
2A Hex
00 Hex
08 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
T he ADV7175/ADV7176 registers can be set depending on the
user standard required.
T he following examples give the various register formats for
several video standards.
In each case the output is set to composite o/p with all DACs
powered up and with the
BLANK
input control disabled. Ad-
ditionally, the burst and color information are enabled on the
output and the internal color bar generator is switched off. In
the examples shown the timing mode is set to Mode 0 in slave
format. T R02–T R00 of the timing register 0 control the timing
modes. For a detailed explanation of each bit in the command
registers, please turn to the register programming section of the
data sheet. T R07 should be toggled after setting up a new tim-
ing mode. T iming Register 1 provides additional control over
the position and duration of the timing signals. In the examples
this register is programmed in default mode.
NT SC
Mode Register 0
Mode Register 1
Subcarrier Frequency Register 0
Subcarrier Frequency Register 1
Subcarrier Frequency Register 2
Subcarrier Frequency Register 3
Subcarrier Phase Register
T iming Register 0
Closed Captioning Ext Register 0
Closed Captioning Ext Register 1
Closed Captioning Register 0
Closed Captioning Register 1
T iming Register 1
Mode Register 2
Pedestal Control Register 0
Pedestal Control Register 1
Pedestal Control Register 2
Pedestal Control Register 3
Mode Register 3
04 Hex
00 Hex
16 Hex
7C Hex
F0 Hex
21 Hex
00 Hex
08 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
PAL (B, D, G, H, I)
Mode Register 0
Mode Register 1
Subcarrier Frequency Register 0
Subcarrier Frequency Register 1
Subcarrier Frequency Register 2
Subcarrier Frequency Register 3
Subcarrier Phase Register
T iming Register 0
Closed Captioning Ext Register 0
Closed Captioning Ext Register 1
Closed Captioning Register 0
Closed Captioning Register 1
T iming Register 1
Mode Register 2
Pedestal Control Register 0
Pedestal Control Register 1
Pedestal Control Register 2
Pedestal Control Register 3
Mode Register 3
01 Hex
00 Hex
CB Hex
8A Hex
09 Hex
2A Hex
00 Hex
08 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex
00 Hex