參數(shù)資料
型號: ADV7175KS
廠商: ANALOG DEVICES INC
元件分類: 顏色信號轉(zhuǎn)換
英文描述: Integrated Digital CCIR-601 YCrCb to PAL/NTSC Video Encoder
中文描述: COLOR SIGNAL ENCODER, PQFP44
封裝: PLASTIC, QFP-44
文件頁數(shù): 13/36頁
文件大?。?/td> 447K
代理商: ADV7175KS
ADV7175/ADV7176
REV. A
–13–
622
623
624
625
1
2
3
4
5
6
7
21
22
23
DISPLAY
VERTICAL BLANK
ODD FIELD
EVEN FIELD
HSYNC
BLANK
VSYNC
DISPLAY
309
310
311
312
313
314
315
316
317
318
319
334
335
336
DISPLAY
VERTICAL BLANK
ODD FIELD
EVEN FIELD
HSYNC
BLANK
DISPLAY
320
VSYNC
Figure 21. Timing Mode 2 (PAL)
Mode 2: Master Option.
HSYNC
,
VSYNC
,
BLANK
.
(T iming Register 0 T R0 = X X X X X 1 0 1 )
In this mode the ADV7175/ADV7176 can generate horizontal and vertical SYNC signals. A coincident low transition of both
HSYNC
and
VSYNC
inputs indicates the start of an odd field. A
VSYNC
low transition when
HSYNC
is high indicates the start of
an even field. T he
BLANK
signal is optional. When the
BLANK
input is disabled the ADV7175/ADV7176 automatically blanks all
normally blank lines as per CCIR-624. Mode 2 is illustrated in Figure 20 (NT SC) and Figure 21 (PAL). Figure 22 illustrates the
HSYNC
,
BLANK
and
VSYNC
for an even to odd field transition relative to the pixel data. Figure 23 illustrates the
HSYNC
,
BLANK
and
VSYNC
for an odd to even field transition relative to the pixel data.
PAL = 12* CLOCK/2
NTSC = 16 * CLOCK/2
LINE 3
LINE 4
HSYNC
VSYNC
BLANK
PIXEL
DATA
PAL = 132* CLOCK/2
NTSC = 118 * CLOCK/2
Cb
Y
Cr
Y
Figure 22. Timing Mode 2 Even-to-Odd Field Transition
相關(guān)PDF資料
PDF描述
ADV7176 Integrated Digital CCIR-601 YCrCb to PAL/NTSC Video Encoder
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ADV7177 Integrated Digital CCIR-601 to PAL/NTSC Video Encoder
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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