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參數(shù)資料
| 型號： | ADV7162KS140 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顯示控制器 |
| 英文描述： | 96-Bit, 220 MHz True-Color Video RAM-DAC |
| 中文描述： | 1600 X 1200 PIXELS PALETTE-DAC DSPL CTLR, PQFP160 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁數(shù)： | 41/44頁 |
| 文件大?。?/td> | 668K |
| 代理商： | ADV7162KS140 |
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ADV7160/ADV7162
REV. 0
–41–
JTAG Test Port
JTAG Test Port is a 4-pin interface consisting of:
TCK: Test Clock
TMS: Test Mode Select
TDI: Test Data Input
TDO: Test Data Output
To put the ADV7160/ADV7162 into the required mode, the In-
struction Register must be loaded.
INSTRUCTION
EXTEST
SAMPLE/PRELOAD
IDCODE
PRIVATE 1
BYPASS
BYPASS
BYPASS
BYPASS
INSTRUCTION REGISTER CODE
000
001
010
011
100
101
110
111
The ADV7160 implementation has the mandatory instructions:
Bypass, Sample/Preload and Extest, and the optional instruc-
tion: IDCode. There is also one private instruction: Private1.
The Private1 instruction is for internal use in production test
only.
The IDCode is a 32-bit number which can be scanned out
through TDO. Its contents are defined below:
VERSION
(4 BITS)
1H
1H
PART NUMBER
(16 BITS)
2776H
2779H
MANUFACTURER ID
(11 BITS)
0E5H
0E5H
LSB
1H
1H
ADV7160
ADV7162
The Boundary Scan Chain is a fundamental feature of the
JTAG Test Port. It allows all the digital input and output pins
on the part to be connected into a shift register between the
TDI and TDO pins. The digital pins can be sampled, or con-
trolled over the JTAG port to carry out testing. The is no
boundary scan cell on the PLL
REF
pin. The Three-State Control
cell controls the three-state status of the microport databus.
There are 131 cells in total on the Boundary Scan Chain.
APPENDIX 6
JTAG TEST PORT (IEEE1149.1)
CE
R/
W
C0
C1
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
THREE-STATE CONTROL
LOADIN
SCKIN
SCKOUT
CLOCK
CLOCK
LOADOUT
PRGCKOUT
PS0
A
PS0
B
PS0
C
PS0
D
PS1
A
PS1
B
PS1
C
PS1
D
R0
A
R0
B
R0
C
R0
D
R1
A
R1
B
R1
C
R1
D
R2
A
R2
B
R2
C
R2
D
R3
A
R3
B
R3
C
R3
D
R4
A
R4
B
R4
C
R4
D
R5
A
R5
B
R5
C
R5
D
R6
A
R6
B
R6
C
R6
D
R7
A
R7
B
R7
C
R7
D
G0
A
G0
B
G0
C
G0
D
TDI
G1
A
G1
B
G1
C
G1
D
G2
A
G2
B
G2
C
G2
D
G3
A
G3
B
G3
C
G3
D
G4
A
G4
B
G4
C
G4
D
G5
A
G5
B
G5
C
G5
D
G6
A
G6
B
G6
C
G6
D
G7
A
G7
B
G7
C
G7
D
B0
A
B0
B
B0
C
B0
D
B1
A
B1
B
B1
C
B1
D
B2
A
B2
B
B2
C
B2
D
B3
A
B3
B
B3
C
B3
D
B4
A
B4
B
B4
C
B4
D
B5
A
B5
B
B5
C
B5
D
B6
A
B6
B
B6
C
B6
D
B7
A
B7
B
B7
C
B7
D
TRISYNC
ODD/
EVEN
SYNC
BLANK
SYNCOUT
TDO
JTAG Boundary Scan Chain
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7162KS170 | 96-Bit, 220 MHz True-Color Video RAM-DAC |
| ADV7162KS220 | 96-Bit, 220 MHz True-Color Video RAM-DAC |
| ADV7160KS140 | 96-Bit, 220 MHz True-Color Video RAM-DAC |
| ADV7160KS170 | 96-Bit, 220 MHz True-Color Video RAM-DAC |
| ADV7160KS220 | 96-Bit, 220 MHz True-Color Video RAM-DAC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7162KS170 | 制造商:AD 制造商全稱:Analog Devices 功能描述:96-Bit, 220 MHz True-Color Video RAM-DAC |
| ADV7162KS220 | 制造商:Analog Devices 功能描述:DAC 3-CH Segment 10-bit 160-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:220 MHZ VIDEO RAM DAC I.C. - Bulk |
| ADV7162KSZ140 | 制造商:Analog Devices 功能描述:DAC 3-CH Segment 10-bit 160-Pin MQFP |
| ADV7162KSZ220 | 制造商:Analog Devices 功能描述:DAC 3-CH Segment 10-bit 160-Pin MQFP |
| ADV7170 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Digital PAL/NTSC Video Encoder with 10-Bit SSAF⑩ and Advanced Power Management |
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