![](http://datasheet.mmic.net.cn/310000/ADV7160_datasheet_16243892/ADV7160_2.png)
ADV7160/ADV7162–SPECIFICATIONS
Parameter
STATIC PERFORMANCE
Resolution (Each DAC)
Accuracy (Each DAC)
Integral Nonlinearity
Differential Nonlinearity
Gray Scale Error
Coding
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN
CLOCK INPUTS (CLOCK,
CLOCK
)
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Current, I
IN
(JTAG Inputs)
Input Capacitance, C
IN
DIGITAL OUTPUTS
Output High Voltage, V
OH
Output Low Voltage, V
OL
Floating-State Leakage Current
Floating-State Output Capacitance
ANALOG OUTPUTS
Gray Scale Current Range
Output Current
White Level Relative to Blank
White Level Relative to Black
Black Level Relative to Blank
Blank Level
Blank Level
Sync Level
Tri-Sync Level Relative to Blank
LSB Size
DAC to DAC Matching
Output Compliance, V
OC
Output Impedance, R
OUT
Output Capacitance, C
OUT
VOLTAGE REFERENCE
Voltage Reference Range, V
REF
Input Current, I
VREF
POWER REQUIREMENTS
V
AA
I
AA3
REV. 0
–2–
Min
Typ
Max
Units
Test Conditions/Comments
(DAC Gain Setting = 3996)
10
Bits
±
1
±
1
±
5
LSB
LSB
% Gray Scale
Binary
Guaranteed Monotonic
2
V
V
μ
A
pF
0.8
±
10
V
IN
= 0.4 V or 2.4 V
10
V
AA
– 1.0
V
V
μ
A
μ
A
pF
V
AA
– 1.6
±
10
±
50
V
IN
= 0.4 V or 2.4 V
V
IN
= 0.4 V or 2.4 V
10
2.4
V
V
μ
A
pF
I
SOURCE
= 400
μ
A
I
SINK
= 3.2 mA
0.4
20
20
(DAC Gain Setting = 3996)
15
22
mA
17.69
16.74
0.95
0
6.29
0
6.29
19.05
17.62
1.44
5
7.62
5
7.62
17.22
1
20.40
18.50
1.90
50
8.96
50
8.96
mA
mA
mA
μ
A
mA
μ
A
mA
μ
A
%
V
k
pF
Sync Disabled
Sync Enabled
3
+1.4
0
30
30
I
OUT
= 0 mA
1.14
1.235
5
1.26
V
μ
A
V
REF
= 1.235 V for Specified Performance
5
V
mA
mA
mA
mA
mA
mA
%/%
475
440
410
450
400
360
For 220 MHz Operation (ADV7160)
For 170 MHz Operation (ADV7160)
For 140 MHz Operation (ADV7160)
For 220 MHz Operation (ADV7162)
For 170 MHz Operation (ADV7162)
For 140 MHz Operation (ADV7162)
COMP = 0.1
μ
F
I
AA3
Power Supply Rejection Ratio
DYNAMIC PERFORMANCE
Clock and Data Feedthrough
4, 5
Glitch Impulse
DAC to DAC Crosstalk
6
0.1
–30
50
–23
dB
pV secs
dB
NOTES
1
±
5% for all versions.
2
Temperature range (T
to T
): 0
°
C to +70
°
C.
3
Pixel Port is continuously clocked with data corresponding to a linear ramp. T
= 100
o
C.
4
Clock and data feedthrough is a function of the amount of overshoot and undershoot on the digital inputs. Glitch impulse includes clock and data feedthrough.
5
TTL input values are 0 V to 3 V, with input rise/fall times
≤
3 ns, measured the 10% and 90% points. Timing reference points at 50% for inputs and outputs.
6
DAC to DAC Crosstalk is measured by holding one DAC high while the other two are making low to high and high to low transitions.
Specifications subject to change without notice.
(V
AA1
= +5 V; V
REF
= +1.235 V; R
SET
= 280
. IOR, IOG, IOB (R
L
= 37.5
,
C
L
= 10 pF). All specifications T
MIN
to T
MAX2
unless otherwise noted.)