參數(shù)資料
型號(hào)： ADV3225ACPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 22/24頁(yè)
文件大小： 0K
描述： IC CROSSPOINT SW 16X8 72LFCSP
標(biāo)準(zhǔn)包裝： 1
功能： 交叉點(diǎn)開關(guān)
電路： 1 x 16:8
電壓電源： 雙電源
電壓 - 電源，單路/雙路(±)： ±5V
電流 - 電源： 58mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 72-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 72-LFCSP-VQ（10x10）
包裝： 托盤
ADV3224/ADV3225
Rev. A | Page 7 of 24
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter
Rating
Analog Supply Voltage (AVCC to AVEE)
11 V
Digital Supply Voltage (DVCC to DGND)
6 V
Supply Potential Difference
(AVCC DVCC)
±0.5 V
Ground Potential Difference
(AGND DGND)
±0.5 V
Maximum Potential Difference
(DVCC AVEE)
6 V
Analog Input Voltage
AVEE < V
IN < AVCC
Digital Input Voltage
DGND < D
IN < DVCC
Exposed Paddle Voltage
AGND
Output Voltage (Disabled Analog
Output)
AVEE < V
OUT < AVCC
Output Short-Circuit
Duration
Momentary
Current
Internally limited to
55 mA
Temperature
Storage Temperature Range
65°C to +125°C
Operating Temperature Range
40°C to +85°C
Junction Temperature
150°C
Lead Temperature (Soldering, 10 sec)
300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 6. Thermal Resistance
Package Type
θ
JA
θ
JC
Unit
72-Lead LFCSP_VQ
29
0.5
°C/W
POWER DISSIPATION
The ADV3224/ADV3225 operate with ±5 V supplies and can
drive loads down to 100 , resulting in a wide range of possible
power dissipations. For this reason, extra care must be taken
when derating the operating conditions based on ambient
temperature.
Packaged in the 72-lead LFCSP, the ADV3224/ADV3225 junction-
to-ambient thermal impedance (θJA) is 29°C/W. For long-term
reliability, the maximum allowed junction temperature of the
die should not exceed 125°C; even temporarily exceeding this
limit can cause a shift in parametric performance due to a
change in stresses exerted on the die by the package. Exceeding
a junction temperature of 150°C for an extended period can
result in device failure. In Figure 4, the curve shows the range
of allowed internal die power dissipation that meets these condi-
tions over the 40°C to +85°C ambient temperature range.
When using Figure 4, do not include the external load power
in the maximum power calculation, but do include the load
current dropped on the die output transistors.
0
1
2
3
4
5
6
7
–40
–20
0
20
40
60
80
MA
XI
MU
M
PO
W
ER
D
ISSI
PA
TION
(
W)
AMBIENT TEMPERATURE (°C)
TJ = 150°C
09317-
004
Figure 4. Maximum Die Power Dissipation vs. Ambient Temperature
ESD CAUTION
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