參數(shù)資料
型號： ADUC7027BST62
廠商： ANALOG DEVICES INC
元件分類： 微控制器/微處理器
英文描述： Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
中文描述： 32-BIT, FLASH, 45.5 MHz, MICROCONTROLLER, PQFP80
封裝： PLASTIC, LQFP-80
文件頁數(shù)： 36/80頁
文件大?。?/td> 840K
代理商： ADUC7027BST62
ADuC702x Series
Preliminary Technical Data
RESET AND REMAP
Rev. PrB | Page 36 of 80
The ARM exception vectors are all situated at the bottom of the
memory array, from address 0x00000000 to address 0x00000020
as shown Figure 16.
00000000h
Mirror Space
0008FFFFh
00080000h
Flash/EE
00011FFFh
00010000h
SRAM
FFFFFFFFh
0x00000000
0x00000020
kernel
interrupt
service routines
interrupt
service routines
ARM exception
vector addresses
Figure 16: remap for exception execution
By default and after any reset, the Flash/EE is mirrored at the
bottom of the memory array. The remap function allows the
programmer to mirror the SRAM at the bottom of the memory
array, facilitating execution of exception routines from SRAM
instead of from Flash/EE. This means exceptions are executed
twice as fast, exception being executed in ARM mode (32 bit)
and the SRAM being 32-bit wide instead of 16-bit wide
Flash/EE memory.
Remap operation
When a reset occurs on the ADuC702x, execution starts
automatically in factory programmed internal configuration
code. This so called kernel is hidden and cannot be accessed by
user code. If the ADuC702x is in normal mode (BM pin is
high), it will execute the power-on configuration routine of the
kernel and then jump to the reset vector address, 0x00000000, to
execute the users reset exception routine.
Because the Flash/EE is mirrored at the bottom of the memory
array at reset, the reset interrupt routine must always be written
in Flash/EE.
The remap is done from Flash/EE by setting bit0 of the REMAP
register. Precaution must be taken to execute this command
from Flash/EE, above address 0x00080020, and not from the
bottom of the array as this will be replaced by the SRAM.
This operation is reversible: the Flash/EE can be remapped at
address 0x00000000 by clearing Bit0 of the REMAP MMR.
Precaution must again be taken to execute the remap function
from outside the mirrored area. Any kind of reset will remap the
Flash /EE memory at the bottom of the array.
Reset
There are four kinds of reset: external reset, Power-on-reset,
watchdog expiation and software force. The RSTSTA register
indicates the source of the last reset and RSTCLR allows to clear
the RSTSTA register. These registers can be used during a reset
exception service routine to identify the source of the reset. If
RSTSTA is null, the reset was external.
Table 17: REMAP MMR bit designations
Bit
0
Name
Remap
Description
Remap Bit.
Set
by the user to remap the SRAM to address 0x00000000.
Cleared
automatically after reset to remap the Flash/EE memory to address 0x00000000.
Table 18: RSTSTA MMR bit designations
Bit
7-3
2
Description
Reserved
Software reset
Set
by user to force a software reset.
Cleared
by setting the corresponding bit in RSTCLR
Watchdog timeout
Set
automatically when a watchdog timeout occurs
Cleared
by setting the corresponding bit in RSTCLR
Power-on-reset
Set
automatically when a power-on-reset occurs
Cleared
by setting the corresponding bit in RSTCLR
1
0
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