參數(shù)資料
型號(hào)： ADSP-BF532SBBC400
廠商： ANALOG DEVICES INC
元件分類： 數(shù)字信號(hào)處理
英文描述： Blackfin Embedded Processor
中文描述： 16-BIT, 40 MHz, OTHER DSP, PBGA160
封裝： MO-205AE, CSBGA-160
文件頁(yè)數(shù)： 2/56頁(yè)
文件大?。?/td> 671K
代理商： ADSP-BF532SBBC400
Rev. 0
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Page 2 of 56
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March 2004
ADSP-BF531/ADSP-BF532/ADSP-BF533
TABLE OF CONTENTS
General Description ................................................. 3
Portable Low Power Architecture ............................. 3
System Integration ................................................ 3
ADSP-BF531/2/3 Processor Peripherals ..................... 3
Blackfin Processor Core .......................................... 3
Memory Architecture ............................................ 4
DMA Controllers .................................................. 8
Real-Time Clock ................................................... 8
Watchdog Timer .................................................. 9
Timers ............................................................... 9
Serial Ports (SPORTs) ............................................ 9
Serial Peripheral Interface (SPI) Port ......................... 9
UART Port ........................................................ 10
Programmable Flags (PFx) .................................... 10
Parallel Peripheral Interface ................................... 10
Dynamic Power Management ................................ 11
Voltage Regulation .............................................. 12
Clock Signals ..................................................... 12
Booting Modes ................................................... 13
Instruction Set Description ................................... 14
Development Tools ............................................. 14
Designing an Emulator Compatible Processor Board ... 15
Pin Descriptions .................................................... 16
Specifications ........................................................ 19
Recommended Operating Conditions ...................... 19
Electrical Characteristics ....................................... 19
Absolute Maximum Ratings .................................. 20
ESD Sensitivity ................................................... 20
Timing Specifications ........................................... 21
Clock and Reset Timing ..................................... 22
Asynchronous Memory Read Cycle Timing ............ 23
Asynchronous Memory Write Cycle Timing ........... 24
SDRAM Interface Timing .................................. 25
External Port Bus Request and Grant Cycle Timing .. 26
Parallel Peripheral Interface Timing ...................... 27
Serial Ports ..................................................... 28
Serial Peripheral Interface (SPI) Port
—Master Timing ........................................... 33
Serial Peripheral Interface (SPI) Port
—Slave Timing ............................................. 34
Universal Asynchronous Receiver-Transmitter
(UART) Port—Receive and Transmit Timing ...... 35
Programmable Flags Cycle Timing ....................... 36
Timer Cycle Timing .......................................... 37
JTAG Test And Emulation Port Timing ................. 38
Output Drive Currents ......................................... 39
Power Dissipation ............................................... 41
Test Conditions .................................................. 42
Environmental Conditions .................................... 45
160-Lead BGA Pinout ............................................. 46
169-Ball PBGA Pinout ............................................. 49
176-Lead LQFP Pinout ............................................ 51
Outline Dimensions ................................................ 53
Ordering Guide ..................................................... 56
REVISION HISTORY
Revision 0: Initial Version
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