參數(shù)資料
型號： ADS1256IDBR
英文描述： Very Low Noise, 24-Bit Analog-to-Digital Converter
中文描述： 極低噪聲，24位模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù)： 21/39頁
文件大?。?/td> 427K
代理商： ADS1256IDBR
SBAS288D JUNE 2003 REVISED AUGUST 2004
www.ti.com
21
Settling Time Using the Input Multiplexer
The most efficient way to cycle through the inputs is to
change the multiplexer setting (using a WREG command
to the multiplexer register MUX) immediately after DRDY
goes low. Then, after changing the multiplexer, restart the
conversion process by issuing the SYNC and WAKEUP
commands, and retrieve the data with the RDATA
command. Changing the multiplexer before reading the
data allows the ADS1256 to start measuring the new input
channel sooner. Figure 19 demonstrates efficient input
cycling. There is no need to ignore or discard data while
cycling through the channels of the input multiplexer
because the ADS1256 fully settles before DRDY goes low,
indicating data is ready.
Step 1: When DRDY goes low, indicating that data is ready
for retrieval, update the multiplexer register MUX using the
WREG command. For example, setting MUX to 23h gives
AIN
P
= AIN2, AIN
N
= AIN3.
Step 2: Restart the conversion process by issuing a SYNC
command immediately followed by a WAKEUP command.
Make sure to follow timing specification t
11
between
commands.
Step 3: Read the data from the previous conversion using
the RDATA command.
Step 4: When DRDY goes low again, repeat the cycle by
first updating the multiplexer register, then reading the
previous data.
Table 14
gives the effective overall throughput (1/t
19
) when
cycling the input multiplexer. The values for throughput
(1/t
19
) assume the multiplexer was changed with a 3-byte
WREG command and f
SCLK
= f
CLKIN
/4.
Table 14. Multiplexer Cycling Throughput
DATA RATE
(SPS)
CYCLING THROUGHPUT (1/t19)
(Hz)
30,000
4374
15,000
3817
7500
3043
3750
2165
2000
1438
1000
837
500
456
100
98
60
59
50
50
30
30
25
25
15
15
10
10
5
5
2.5
2.5
NOTE: fCLKIN = 7.68MHz.
DRDY
DOUT
DIN
ReMUX
01h
AIN
P
= AIN0, AIN
N
= AIN1
Data from
MUX = 01h
23h
AINP= AIN2, AIN
N
= AIN3
45h
AIN
P
= AIN4, AIN
N
= AIN5
Data from
MUX = 23h
RDATA
SYNC
WAKEUP
SYNC
WAKEUP
WREG 23h
to MUX reg
RDATA
WREG 45h
to MUX reg
t
18
t
19
Figure 19. Cycling the ADS1256 Input Multiplexer
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