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Preliminary Technical Data
ADE7169F16
Mnemonic
JMP @A+DPTR
Rev. PrD | Page 79 of 140
Description
Jump indirect relative to DPTR
Bytes
1
Cycles
3
RET
RETI
ACALL addr11
AJMP addr11
SJMP rel
JC rel
JNC rel
JZ rel
JNZ rel
DJNZ Rn,rel
LJMP
LCALL addr16
JB bit,rel
JNB bit,rel
JBC bit,rel
CJNE A,dir,rel
CJNE A,#data,rel
CJNE Rn,#data,rel
CJNE @Ri,#data,rel
DJNZ dir,rel
Return from subroutine
Return from interrupt
Absolute jump to subroutine
Absolute jump unconditional
Short jump (relative address)
Jump on carry equal to 1
Jump on carry equal to 0
Jump on accumulator =0
Jump on accumulator not equal to 0
Decrement register,JNZ relative
Long jump unconditional
Long jump to subroutine
Jump on direct bit =1
Jump on direct bit =0
Jump on direct bit =1 and clear
Compare A,direct JNE relative
Compare A,immediate JNE relative
Compare register,immediate JNE relative
Compare indirect,immediate JNE relative
Decrement direct byte,JNZ relative
1
1
2
2
2
2
2
2
2
2
3
3
3
3
3
3
3
3
3
3
4
4
3
3
3
3
3
3
3
3
4
4
4
4
4
4
4
4
4
4
Miscellaneous
NOP
No operation
1
1
READ-MODIFY-WRITE INSTRUCTIONS
Some 8051 instructions read the latch while others read the pin.
The state of the pin is read for instructions that input a port bit.
Instructions that read the latch rather than the pins are the ones
that read a value, possibly change it, and rewrite it to the latch.
Since these instructions involve modifying the port, it is
assumed that the pins being modified are outputs, so the output
state of the pin is read from the latch. This prevents a possible
misinterpretation of the voltage level of a pin. For example, if a
port pin is used to drive the base of a transistor, a 1 is written to
the bit, to turn the transistor on. If the CPU reads the same port
bit at the pin rather than the latch, it reads the base voltage of
the transistor and interprets it as Logic 0. Reading the latch
rather than the pin returns the correct value of 1.
The instructions that read the latch rather than the pins are
called read-modify-write instructions, and are listed in Table
61. When the destination operand is a port or a port bit, these
instructions read the latch rather than the pin.
Table 61. Read-Modify-Write Instructions
Instruction
Example
Description
ANL
ORL
XRL
JBC
CPL
INC
DEC
DJNZ
ANL P0, A
ORL P1, A
XRL P2, A
JBC P1.1, LABEL
CPL P2.0
INC P2
DEC P2
DJNZ P0, LABEL
Logical AND
Logical OR
Logical EX-OR
Jump if Bit = 1 and clear bit
Complement bit
Increment
Decrement
Decrement and jump if not
zero
Move Carry to Bit Y of Port
X
Clear Bit Y of Port X
Set Bit Y of Port X
MOV PX.Y, C
1
MOV P0.0,C
CLR PX.Y
1
SETB PX.Y
1
___________________________________________
CLR P0.0
SETB P0.0
1
These instructions read the port byte (all 8 bits), modify the addressed bit,
and write the new byte back to the latch.
INSTRUCTIONS THAT AFFECT FLAGS
Many instructions explicitly modify the Carry bit such as the
affect status flags are listed in this section.