參數資料
型號: AD9983AKSTZ-1701
廠商: Analog Devices, Inc.
英文描述: High Performance 8-Bit Display Interface
中文描述: 高性能8位顯示接口
文件頁數: 15/44頁
文件大?。?/td> 470K
代理商: AD9983AKSTZ-1701
Preliminary Technical Data
AD9983A
The polarity of the coast signal may be set through the coast
polarity register (Register 0x18, Bits[6:5]). Also, the polarity of
the Hsync signal can be set through the Hsync polarity register
(Register 0x12, Bits[5:4]). For both Hsync and coast, a value of 1
Rev. PrA | Page 15 of 44
is active high. The internal coast function is driven off the
Vsync signal, which is typically a time when Hsync signals may
be disrupted with extra equalization pulses.
Table 10. Recommended VCO Range and Charge Pump and Current Settings for Standard Display Formats
Refresh Rate
(Hz)
Frequency (kHz)
VGA
640 × 480
60
31.500
72
37.700
75
37.500
85
43.300
SVGA
800 × 600
56
35.100
60
37.900
72
48.100
75
46.900
85
53.700
XGA
1024 × 768
60
48.400
70
56.500
75
60.000
80
64.000
85
68.300
SXGA
1280 × 1024
60
64.000
75
80.000
85
91.100
UXGA
1600 × 1200
60
75.000
TV
480i
30
15.750
480p
60
31.470
576i
30
15.625
576p
60
31.250
720p
60
45.000
1035i
30
33.750
1080i
60
33.750
1080p
60
67.500
Standard
Resolution
Horizontal
Pixel Rate (MHz)
25.175
31.500
31.500
36.000
36.000
40.000
50.000
49.500
56.250
65.000
75.000
78.750
85.500
94.500
108.000
135.000
157.500
162.000
13.510
27.000
13.500
27.000
74.250
74.250
74.250
148.500
PLL Divider
800
832
840
832
1024
1056
1040
1056
1048
1344
1328
1312
1336
1376
1688
1688
1728
2160
858
858
864
864
1650
2200
2200
2200
VCO
Range
00
01
01
01
01
01
01
01
01
10
10
10
10
10
10
11
11
11
00
00
00
00
10
10
10
11
Current
101
100
100
100
100
101
101
101
110
100
101
101
101
110
110
110
110
110
101
101
101
101
101
101
101
101
VCO Gear
(R0x36[0])
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0
0
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