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參數(shù)資料
| 型號(hào)： | AD9981 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | High Performance 10-Bit Display Interface |
| 中文描述： | 高性能10位顯示接口 |
| 文件頁數(shù)： | 36/44頁 |
| 文件大?。?/td> | 506K |
| 代理商： | AD9981 |
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AD9981
Preliminary Technical Data
0x1F
Rev. 0 | Page 36 of 44
3
Secondary Output Enable
This bit places the secondary output in active or high
impedance mode.
The secondary output is designated when using either
4:2:2 or 4:4:4 (DDR). In these modes, the data on the
blue output channel is the secondary output while the
output data on the red and green channels are the
primary output. Secondary output is always a DDR
YCbCr data mode. See the Output Formatter section
and Table 11. The power-up default setting is 0.
Table 45. Secondary Output Enable
Select
Result
0
Secondary output is in high impedance mode
1
Secondary output is enabled
0x1F
2:1
Output Drive Strength
These two bits select the drive strength for all the
high-speed digital outputs (except VSOUT, A0, and
the O/E field). Higher drive strength results in faster
rise/fall times and in general makes it easier to capture
data. Lower drive strength results in slower rise/fall
times and helps to reduce EMI and digitally generated
power supply noise. The power-up default setting
is 10.
Table 46. Output Drive Strength
Output Drive
Result
00
Low output drive strength
01
Medium low output drive strength
10
Medium high output drive strength
11
High output drive strength
0x1F
0
Output Clock Invert
This bit allows inversion of the output clock. The
power-up default setting is 0.
Table 47. Output Clock Invert
Select
Result
0
Noninverted pixel clock
1
Inverted pixel clock
0x20
7:6
Output Clock Select
These bits allow selection of optional output clocks
such as a fixed 40 MHz clock, a 2× clock, a 90° phase-
shifted clock, or the normal pixel clock. The power-up
default setting is 00.
Table 48. Output Clock Select
Select
Result
00
Pixel clock
01
90° phase-shifted pixel clock
10
2× pixel clock
11
40 MHz internal clock
0x20
5
Output High Impedance
This bit puts all outputs (except SOGOUT) in a high impedance
state. The power-up default setting is 0.
Table 49. Output High Impedance
Select
Result
0
Normal outputs
1
All outputs (except SOGOUT) in high impedance
mode
0x20
4
SOG High Impedance
This bit allows the SOGOUT pin to be placed in high
impedance mode. The power-up default setting is 0.
Table 50. SOGOUT High Impedance
Select
Result
0
Normal SOG output
1
SOGOUT pin is in high impedance mode
0x20
3
Field Output Polarity
This bit sets the polarity of the field output bit. The
power-up default setting is 1.
Table 51. Field Output Polarity
Select
Result
0
Active low = even field; active high = odd field
1
Active low = odd field; active high = even field
SYNC PROCESSING
0x20
2
PLL Sync Filter
This bit selects which signal the PLL uses. It can select
between either raw Hsync or SOG or filtered versions.
The filtering of the Hsync and SOG can eliminate
nearly all extraneous transitions which have tradi-
tionally caused PLL disruption. The power-up default
setting is 0.
Table 52. PLL Sync Filter Enable
Select
Result
0
PLL uses raw Hsync or SOG inputs
1
PLL uses filtered Hsync or SOG inputs
0x20
1
Sync Processing Input Source
This bit selects whether the sync processor uses a raw
sync or a regenerated sync for the following functions:
Coast, H/V count, field detection and Vsync duration
counts. Using the regenerated sync is recommended.
Table 53. SP Filter Enable
Select
Result
0
Sync processing uses raw Hsync or SOG
1
Sync processing uses the internally regenerated
Hsync
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相關(guān)代理商/技術(shù)參數(shù) |
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| AD9981/PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:High Performance 10-Bit Display Interface |
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| AD9981KSTZ-80 | 功能描述:IC INTERFACE 10BIT ANALOG 80LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標(biāo)準(zhǔn)包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復(fù)用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
| AD9981KSTZ-95 | 功能描述:IC INTERFACE 10BIT ANALOG 80LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標(biāo)準(zhǔn)包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復(fù)用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
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