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參數(shù)資料
| 型號： | AD9911BCPZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 500 MSPS Direct Digital Synthesizer with 10-Bit DAC |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 10-BIT DAC, QCC56 |
| 封裝： | 8 X 8 MM, LEAD FREE, MO-220VLLD-2, LFCSP-56 |
| 文件頁數(shù)： | 40/44頁 |
| 文件大?。?/td> | 666K |
| 代理商： | AD9911BCPZ |
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AD9911
CFR <6> = 0 (default). The DAC is enabled for operation.
CFR <6> = 1. The DAC is disabled and held in its lowest power
dissipation state.
Rev. 0 | Page 40 of 44
CFR <7> digital power-down.
CFR <7> = 0 (default). The digital core is enabled for operation.
CFR <7> = 1. The digital core is disabled and is in its lowest
power dissipation state.
CFR <9:8>. DAC LSB control (see Table 5).
CFR <9:8> = 00 (default).
CFR <10> must be cleared to 0.
CFR <13> linear sweep ramp rate load at I/O_UPDATE.
CFR <13> = 0 (default). The linear sweep ramp rate timer is
loaded only upon timeout (timer = 1); it is not loaded by the
I/O_UPDATE input signal.
CFR <13> = 1. The linear sweep ramp rate timer is loaded upon
timeout (timer = 1) or at the time of an I/O_UPDATE input
signal.
CFR <14> linear sweep enable.
CFR <14> = 0 (default). The linear sweep capability of the
AD9911 is inactive. CFR <14> = 1. The linear sweep capability
of the AD9911 is active. The delta frequency tuning word is
applied to the frequency accumulator at the programmed
ramp rate.
CFR <15> linear sweep no-dwell.
CFR <15> = 0 (default). The linear sweep no-dwell function is
inactive. CFR <15> = 1. The linear sweep no-dwell function is
active. See the Linear Sweep (Shaped) Modulation Mode
section for details. If CFR <14> is clear, this bit is ignored.
CFR <18:16> Data align bits for SpurKiller mode. See the
SpurKiller/Multitone Mode section for details.
CFR <21:19> inactive.
CFR <23:22> amplitude/frequency/phase select controls, the
type of modulation is to be performed for that channel. See the
Shift Keying Mode section for examples.
Channel Frequency Tuning Word 0 (CFTW0) Description
CFTW0 <32:0> Frequency Tuning Word 0 for each channel.
Channel Phase Offset Word 0 (CPOW0) Description
CPOW0 <13:0> Phase Offset Word 0 for each channel.
CPOW0 <15:14> inactive.
Amplitude Control Register (ACR) Description
ACR <9:0> amplitude scale factor.
ACR <10> amplitude ramp rate load control bit.
ACR <10> = 0 (default). The amplitude ramp rate timer is
loaded only upon timeout (timer = 1) and is not loaded by an
I/O_UPDATE input signal (or change in the profile select bits).
ACR <10> = 1. The amplitude ramp rate timer is loaded upon
timeout (timer =1) or at the time of an I/O_UPDATE input
signal (or change in profile select bits).
ACR <11> auto RU/RD enable (only valid when ACR <12> is
active high).
ACR <11> = 0 (default). When ACR <12> is active, Logic 0 on
ACR <11> enables the manual RU/RD operation. See the
Output Amplitude Control section of this document for details.
ACR <11> = 1. If ACR <12> is active, a Logic 1 on ACR <11>
enables the AUTO RU/RD operation. See the Output
Amplitude Control section for details.
ACR <12> amplitude multiplier enable.
ACR <12> = 0 (default). Amplitude multiplier is disabled. The
associated clocks are stopped for power saving; the data from
the DDS core is routed around the multipliers.
ACR <12> = 1, amplitude multiplier is enabled.
ACR <13> inactive.
ACR <15:14> amplitude increment/decrement step size. See
Table 20 for details.
ACR <23:16> amplitude ramp rate value.
Channel Linear Sweep Register (LSR) Description
LSR <15:0> linear sweep rising ramp rate.
Channel Linear Sweep Rising Delta Word Register (RDW)
Description
RDW <31:0> 32-bit rising delta tuning word.
Channel Linear Sweep Falling Delta Word Register
(FDW) Description
FDW <31:0> 32-bit falling delta tuning word.
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| AD9911BCPZ-REEL7 | 功能描述:IC DDS 500MSPS DAC 10BIT 56LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9912 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS Direct Digital Synthesizer w/ 14-bit DAC |
| AD9912/PCBZ | 制造商:Analog Devices 功能描述:Evaluation Kit For 1 GSPS Direct Digital Synthesizer W/ 14-Bit DAC 制造商:Analog Devices 功能描述:EVAL KIT FOR 1 GSPS DIRECT DGTL SYNTHESIZER W/ 14BIT DAC - Bulk 制造商:Analog Devices 功能描述:EVALUATION BOARD AD9912 1GSPS DDS |
| AD9912A/PCBZ | 功能描述:BOARD EVALUATION FOR AD9912 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| AD9912ABCPZ | 功能描述:IC DDS 1GSPS DAC 14BIT 64LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
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