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AD9911
TABLE OF CONTENTS
Features..............................................................................................1
Rev. 0 | Page 2 of 44
Applications.......................................................................................1
General Description.........................................................................1
Revision History...............................................................................2
Functional Block Diagram..............................................................3
Specifications.....................................................................................4
Absolute Maximum Ratings............................................................9
ESD Caution..................................................................................9
Equivalent Input and Output Circuits.......................................9
Pin Configuration and Function Descriptions...........................10
Typical Performance Characteristics...........................................12
Application Circuits.......................................................................17
Theory of Operation......................................................................18
Primary DDS Core.....................................................................18
SpurKiller/Multitone Mode and Test-Tone Modulation.......18
D/A Converter............................................................................18
Modes of Operation.......................................................................19
Single-Tone Mode ......................................................................19
SpurKiller/Multitone Mode ......................................................19
Test-tone Mode...........................................................................20
Reference Clock Modes.............................................................20
Scalable DAC Reference Current Control Mode...................21
Power-Down Functions.............................................................21
Shift Keying Modulation...........................................................21
Shift Keying Modulation Using SDIO Pins for RU/RD........23
Linear Sweep (Shaped) Modulation Mode.............................23
Linear Sweep No Dwell Mode..................................................25
Sweep and Phase Accumulator Clearing Functions.............. 26
Output Amplitude Control....................................................... 26
Synchronizing Multiple AD9911 Devices................................... 28
Operation .................................................................................... 28
Automatic Mode Synchronization........................................... 28
Manual Software Mode Synchronization................................ 28
Manual Hardware Mode Synchronization.............................. 28
I/O_Update, SYNC_CLK, and System Clock
Relationships............................................................................... 29
I/O Port............................................................................................ 30
Overview ..................................................................................... 30
Instruction Byte Description.................................................... 30
I/O Port Pin Description........................................................... 31
I/O Port Function Description................................................. 31
MSB/LSB Transfer Description................................................ 31
I/O Modes of Operation............................................................ 31
Register Maps.................................................................................. 35
Control Register Map ................................................................ 35
Channel Register Map............................................................... 36
Profile Register Map................................................................... 37
Control Register Descriptions...................................................... 38
Channel Select Register (CSR) ................................................. 38
Channel Function Register (CFR) Description...................... 39
Outline Dimensions....................................................................... 41
Ordering Guide .......................................................................... 41
REVISION HISTORY
5/06—Revision 0: Initial Version