參數(shù)資料
型號： AD9777
廠商： Analog Devices, Inc.
英文描述： 16-Bit, 160 MSPS 2X/4X/8X Interpolating Dual TxDAC+ D/A Converter
中文描述： 16位，160 MSPS的2X/4X/8X TxDAC系列插雙D / A轉(zhuǎn)換
文件頁數(shù)： 30/48頁
文件大?。?/td> 6021K
代理商： AD9777
REV. 0
–30–
AD9777
f
OUT
, NORMALIZED TO
f
DATA
WITH ZERO STUFFING
DISABLED – Hz
S
0
0
–50
–40
–30
–20
–10
0.5
10
1.0
1.5
2.0
ZERO STUFFING
ENABLED
ZERO STUFFING
DISABLED
Figure 29. Effect of Zero Stuffing on DAC’s
SIN(x)/x Response
To improve upon the pass-band flatness of the desired image, the
zero stuffing mode can be enabled by setting the control register
bit to a Logic “1.” This option increases the ratio of f
DAC
/f
DATA
by a factor of 2 by doubling the DAC sample rate and inserting
a midscale sample (i.e., 1000 0000 0000 0000) after every data
sample originating from the interpolation filter. This is important as
it will affect the PLL divider ratio needed to keep the VCO within
its optimum speed range. Note that the zero stuffing takes place
in the digital signal chain at the output of the digital modulator,
before the DAC.
The net effect is to increase the DAC output sample rate by a
factor of 2
×
with the “0” in the SIN(x)/x DAC transfer function
occurring at twice the original frequency. A 6 dB loss in amplitude
at low frequencies is also evident, as can be seen in Figure 30.
It is important to realize that the zero stuffing option by itself does
not change the location of the images but rather their amplitude,
pass-band flatness, and relative weighting. For instance, in the
previous example, the pass-band amplitude flatness of the image
at 3
×
f
DATA
/4 is now improved to 0.59 dB while the signal level
has increased slightly from –10.5 dBFS to –8.1 dBFS.
INTERPOLATING (COMPLEX MIX MODE)
(Control Register 01h, Bit 2)
In the complex mix mode, the two digital modulators on the
AD9777 are coupled to provide a complex modulation function.
In conjunction with an external quadrature modulator, this
complex modulation can be used to realize a transmit image
rejection architecture. The complex modulation function can be
programmed for e
+j t
or
e
–j t
to give upper or lower image rejec-
tion. As in the real modulation mode, the modulation frequency
can be programmed via the SPI port for f
DAC
/2, f
DAC
/4, and
f
DAC
/8, where f
DAC
represents the DAC output rate.
OPERATIONS ON COMPLEX SIGNALS
Truly complex signals cannot be realized outside of a computer
simulation. However, two data channels, both consisting of real
data, can be defined as the real and imaginary components of a
complex signal. I (real) and Q (imaginary) data paths are often
defined this way. By using the architecture defined in Figure 30,
a system that operates on complex signals can be realized,
giving a complex (real and imaginary) output.
If a complex modulation function (e
+j t
) is desired, the real and
imaginary components of the system correspond to the real and
imaginary components of e
+j t
, or cos t and sin t. As Figure 31
shows, the complex modulation function can be realized by
applying these components to the structure of the complex
system defined in Figure 30.
a(t)
INPUT
INPUT
OUTPUT
OUTPUT
COMPLEX FILTER
= (c + jd)
IMAGINARY
b(t)
b(t)
a(t) + c
b(t)
c(t)
b(t) + d
b(t)
Figure 30. Realization of a Complex System
90
OUTPUT
(IMAGINARY)
OUTPUT
(REAL)
INPUT
(REAL)
INPUT
(IMAGINARY)
e
–j t
= COS t + jSIN t
Figure 31. Implementation of a Complex Modulator
COMPLEX MODULATION AND IMAGE REJECTION OF
BASEBAND SIGNALS
In traditional transmit applications, a two-step upconversion is
done in which a baseband signal is modulated by one carrier to
an IF (intermediate frequency) and then modulated a second
time to the transmit frequency. Although this approach has
several benefits, a major drawback is that two images are created
near the transmit frequency. Only one image is needed, the other
being an exact duplicate. Unless the unwanted image is filtered,
typically with analog components, transmit power is wasted and
the usable bandwidth available in the system is reduced.
A more efficient method of suppressing the unwanted image
can be achieved by using a complex modulator followed by a
quadrature modulator. Figure 32 is a block diagram of a quadra-
ture modulator. Note that it is in fact the real output half of a
complex modulator. The complete upconversion can actually be
referred to as two complex upconversion stages, the real output
of which becomes the transmitted signal.
90
OUTPUT
INPUT
(REAL)
INPUT
(IMAGINARY)
COS t
SIN t
Figure 32. Quadrature Modulator
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參數(shù)描述
AD9777BSV 制造商:Analog Devices 功能描述:DAC 2-CH R-2R 16-bit 80-Pin TQFP EP 制造商:Rochester Electronics LLC 功能描述:16BIT 160 MSPS DUAL TXDAC+ D/A CONVERTER - Bulk 制造商:Analog Devices 功能描述:Digital-Analog Converter IC Interface Ty
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AD9777BSVZ 功能描述:IC DAC 16BIT DUAL 160MSPS 80TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 標準包裝:1 系列:- 設(shè)置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND
AD9777BSVZ 制造商:Analog Devices 功能描述:IC 16-BIT DAC ((NW)) 制造商:Analog Devices 功能描述:IC, DAC, 16BIT, 400MSPS, TQFP-80
AD9777BSVZ 制造商:Analog Devices 功能描述:IC DAC 16BIT 400MSPS 80TQFP
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