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AD9777
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errors associated with analog quadrature modulators. The 6 dB
of gain adjustment range can also be used to control the output
power level of each DAC.
The AD9777 features the ability to perform f
S
/2, f
S
/4, and f
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/8
digital modulation and image rejection when combined with an
analog quadrature modulator. In this mode, the AD9777 accepts
I and Q complex data (representing a single or multicarrier wave-
form), generates a quadrature modulated IF signal along with its
orthogonal representation via its dual DACs, and presents these
two reconstructed orthogonal IF carriers to an analog quadrature
modulator to complete the image rejection upconversion process.
Another digital modulation mode (i.e., the Direct IF Mode)
allows the original baseband signal representation to be frequency
translated such that pairs of images fall at multiples of one-half
the DAC update rate.
The AD977x family includes a flexible clock interface accepting
differential or single-ended sine wave or digital logic inputs. An
internal PLL clock multiplier is included and generates the
necessary on-chip high frequency clocks. It can also be disabled
to allow the use of a higher performance external clock source. An
internal programmable divider simplifies clock generation in the
converter when using an external clock source. A flexible data
input interface allows for straight binary or two’s complement
formats and supports single-port interleaved or dual-port data.
Dual high performance DAC outputs provide a differential
current output programmable over a 2 mA to 20 mA range. The
AD9777 is manufactured on an advanced 0.35 micron CMOS
process, operates from a single supply of 3.1 V to 3.5 V, and
consumes 1.2 W of power.
Targeted at wide dynamic range, multicarrier and multistandard
systems, the superb baseband performance of the AD9777 is
ideal for wideband CDMA, multicarrier CDMA, multicarrier
TDMA, multicarrier GSM, and high performance systems
employing high order QAM modulation schemes. The image
rejection feature simplifies and can help to reduce the number
of signal band filters needed in a transmit signal chain. The
direct IF mode helps to eliminate a costly mixer stage for a
variety of communications systems.
PRODUCT HIGHLIGHTS
1.
The AD9777 is the 16-bit member of the AD977x pin-
compatible, high performance, programmable 2
×
/4
×
/8
×
interpolating TxDAC+ family.
2.
Direct IF transmission is possible for 70 MHz + IFs through
a novel digital mixing process.
3.
f
S
/2, f
S
/4, and f
S
/8 digital quadrature modulation and
user-selectable image rejection simplify/remove cascaded
SAW filter stages.
4.
A 2
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/4
×
/8
×
user-selectable interpolating filter eases data
rate and output signal reconstruction filter requirements.
5.
User-selectable two’s complement/straight binary data
coding.
6.
User programmable channel gain control over 1 dB range
in 0.01 dB increments.
7.
User-programmable channel offset control
±
10% over
the FSR.
8.
Ultra high speed 400 MSPS DAC conversion rate.
9.
Internal clock divider provides data rate clock for easy
interfacing.
10.
Flexible clock input with single-ended or differential input,
CMOS, or 1 V p-p LO sine wave input capability.
11.
Low power: Complete CMOS DAC operates on 1.2 W
from a 3.1 V to 3.5 V single supply. The 20 mA full-scale
current can be reduced for lower power operation, and
several sleep functions are provided to reduce power during
idle periods.
12.
On-chip voltage reference: The AD9777 includes a 1.20 V
temperature compensated band gap voltage reference.
13.
80-lead thermally enhanced TQFP.