參數(shù)資料
型號: AD9641-80KITZ
廠商: Analog Devices Inc
文件頁數(shù): 36/36頁
文件大小: 0K
描述: BOARD EVAL FOR AD9641
設(shè)計資源: AD9641 Gerber Files
AD9641 80KITZ BOM
標準包裝: 1
ADC 的數(shù)量: 1
位數(shù): 14
采樣率(每秒): 80M
數(shù)據(jù)接口: 串行,SPI?
輸入范圍: 1.4 ~ 2.1 Vpp
工作溫度: -40°C ~ 85°C
已用 IC / 零件: AD9641
已供物品:
Data Sheet
AD9641
Rev. B | Page 9 of 36
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NOTES
1. DNC = DO NOT CONNECT.
2. THE EXPOSED THERMAL PAD ON THE BOTTOM OF THE PACKAGE
PROVIDES THE ANALOG GROUND FOR THE PART. THIS EXPOSED PAD
MUST BE CONNECTED TO GROUND FOR PROPER OPERATION.
TOP VIEW
(Not to Scale)
AD9641
CSB
SCLK
SDIO
PDWN
DNC
DRGND
DRVDD
AVDD
AV
D
AV
D
AV
D
VI
N
+
VI
N
AV
D
AV
D
VC
M
DRV
DD
DO
UT
+
DO
UT
DRG
ND
DRV
DD
DRG
ND
D
SYN
C
+
DS
Y
NC–
PIN 1
INDICATOR
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9
0
1
11 21 31 41 51 61
2
3
13 03 92 82 72 62 52
DNC
AVDD
CLK+
CLK–
AVDD
SYNC
AVDD
09
21
0-
00
4
Figure 4. LFCSP Pin Configuration (Top View)
Table 8. Pin Function Descriptions
Pin No.
Mnemonic
Type
Description
ADC Power Supplies
12, 16, 18, 19
DRVDD
Supply
Digital Output Driver Supply (1.8 V Nominal).
1, 3, 6, 8, 26, 27, 30, 31, 32
AVDD
Supply
Analog Power Supply (1.8 V Nominal).
2, 23
DNC
Do Not Connect.
11, 13, 17
DRGND
Driver ground
Digital Driver Supply Ground.
0
AGND, Exposed pad
Ground
The exposed thermal pad on the bottom of the package provides
the analog ground for the part. This exposed pad must be connected
to ground for proper operation.
ADC Analog
29
VIN+
Input
Differential Analog Input Pin (+).
28
VIN
Input
Differential Analog Input Pin ().
25
VCM
Output
Common-Mode Level Bias Output.
4
CLK+
Input
ADC Clock Input—True.
5
CLK
Input
ADC Clock Input—Complement.
Digital Inputs
7
SYNC
Input
Input Clock Divider Synchronization Pin.
10
DSYNC+
Input
Active Low JESD204A LVDS Sync Input—True/Active Low
JESD204A CMOS Sync Input.
9
DSYNC
Input
Active Low JESD204A LVDS Sync Input—Complement.
Digital Outputs
15
DOUT+
Output
CML Output Data—True.
14
DOUT
Output
CML Output Data—Complement.
SPI Control
21
SCLK
Input
SPI Serial Clock.
20
SDIO
Input/output
SPI Serial Data I/O.
22
CSB
Input
SPI Chip Select (Active Low).
ADC Configuration
24
PDWN
Input
Power-Down Input. Using the SPI interface, this input can be
configured as power-down or standby.
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