- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄17018 > AD9641-80KITZ (Analog Devices Inc)BOARD EVAL FOR AD9641 PDF資料下載
參數(shù)資料
| 型號： | AD9641-80KITZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 14/36頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD9641 |
| 設(shè)計資源： | AD9641 Gerber Files AD9641 80KITZ BOM |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 80M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 輸入范圍： | 1.4 ~ 2.1 Vpp |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD9641 |
| 已供物品： | 板 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁當(dāng)前第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
Data Sheet
AD9641
Rev. B | Page 21 of 36
POWER DISSIPATION AND STANDBY MODE
As shown in Figure 60, the power dissipated by the AD9641
varies with its sample rate. The data in Figure 60 was taken
in JESD204A serial output mode, using the same operating
conditions as those used for the Typical Performance
09
21
0-
0
42
0
0.05
0.10
0.15
0
0.10
0.20
0.30
40
50
60
70
80
S
UP
P
LY
CU
RRE
N
T
(
A)
TO
TA
L
P
O
W
E
R
(
W
)
ENCODE FREQUENCY (MSPS)
TOTAL
POWER
IDRVDD
IAVDD
Figure 60. Power and Current vs. Encode Frequency
The AD9641 is placed in power-down mode using Register 0x08,
Bits[1:0] or by asserting the PDWN pin high. In this state, the
ADC typically dissipates 7 mW. During power-down, the output
drivers are placed in a high impedance state. Pulling the PDWN
pin low returns the AD9641 to its normal operating mode. Low
power dissipation in power-down mode is achieved by shutting
down the reference, reference buffer, biasing networks, and clock.
Internal capacitors are discharged when entering power-down
mode and then must be recharged when returning to normal
operation.
When using the SPI port interface, the user can place the ADC
in power-down mode or standby mode (Register 0x08, Bits[1:0]).
Standby mode allows the user to keep the internal reference
circuitry powered and the JESD204A outputs running when
faster wake-up times are required.
DIGITAL OUTPUTS
JESD204A Transmit Top Level Description
The AD9641 digital output complies with the JEDEC Standard
No. 204A (JESD204A), which describes a serial interface for
data converters. JESD204A uses 8b/10b encoding, as well as
optional scrambling. K28.5 and K28.7 comma symbols are used
for frame synchronization, and the K28.3 control symbol is used
for lane synchronization. The receiver is required to lock onto
the serial data stream and recover the clock with the use of a PLL.
For details on the output interface, users are encouraged to refer
to the JESD204A standard.
The JESD204A link is described according to the following
nomenclature:
S = samples transmitted per single converter per
frame cycle
M = number of converters per converter device (link)
L = number of lanes per converter device (link)
N = converter resolution
N’ = total number of bits per sample
CF = number of control words per frame clock cycle per
converter device (link)
CS = number of control bits per conversion sample
K = number of frames per multiframe
HD = high density mode
F = number of octets per frame
C = control bit (overrange, overflow, underflow)
T = tail bit
SCR = scrambling enabled
FCHK = checksum
The JESD204A block for the AD9641 is designed to support the
configurations described in Table 10.
Table 10. AD9641 JESD204A Typical Configuration
Configuration
JESD204A Link Settings
Comments
M = 1; L = 1; S = 1; F = 2
Maximum sample rate = 80 or 155 MSPS
One Converter
N’ = 16; CF = 0
One JESD204A Link
CS = 0, 1, 2; K = N/A
One Lane Per Link
SCR = 0, 1; HD = 0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LGU2C102MELB | CAP ALUM 1000UF 160V 20% SNAP |
| 0210490969 | CABLE JUMPER 1.25MM .076M 27POS |
| VI-BWY-EW | CONVERTER MOD DC/DC 3.3V 66W |
| UVZ1H682MRD | CAP ALUM 6800UF 50V 20% RADIAL |
| AD9644-80KITZ | BOARD EVALUATION FOR AD9644 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9641BCPZ-155 | 制造商:Analog Devices 功能描述:14BIT 155MSPS ADC W/JESD204A - Trays 制造商:Analog Devices 功能描述:IC ADC 14BIT SRL 155MSPS 32LFCSP |
| AD9641BCPZ-80 | 功能描述:IC ADC 14BIT SRL 80MSPS 32LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD9641BCPZRL7-155 | 制造商:Analog Devices 功能描述:14BIT 155MSPS ADC W/JESD204A - Tape and Reel 制造商:Analog Devices 功能描述:IC ADC 14BIT SRL 155MSPS 32LFCSP |
| AD9641BCPZRL7-80 | 功能描述:14 Bit Analog to Digital Converter 1 Input 1 Pipelined 32-LFCSP-WQ (5x5) 制造商:analog devices inc. 系列:- 包裝:帶卷（TR） 零件狀態(tài):有效 位數(shù):14 采樣率（每秒）:80M 輸入數(shù):1 輸入類型:差分 數(shù)據(jù)接口:JESD204A 配置:S/H-ADC 無線電 - S/H:ADC:1:1 A/D 轉(zhuǎn)換器數(shù):1 架構(gòu):管線 參考類型:內(nèi)部 電壓 - 電源，模擬:1.7 V ~ 1.9 V 電壓 - 電源，數(shù)字:1.7 V ~ 1.9 V 特性:- 工作溫度:-40°C ~ 85°C 封裝/外殼:32-WFQFN 裸露焊盤，CSP 供應(yīng)商器件封裝:32-LFCSP-WQ（5x5） 標(biāo)準(zhǔn)包裝:1,500 |
| AD9642 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter (ADC) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。