參數(shù)資料
型號(hào)： AD9244BST-65
廠商： ANALOG DEVICES INC
元件分類(lèi)： ADC
英文描述： 14-Bit, 40/65 MSPS Monolithic A/D Converter
中文描述： 1-CH 14-BIT FLASH METHOD ADC, PARALLEL ACCESS, PQFP48
封裝： MS-026-BBC, LQFP-48
文件頁(yè)數(shù)： 22/36頁(yè)
文件大?。?/td> 1845K
代理商： AD9244BST-65
REV. A
–22–
AD9244
from single-ended signals to differential. Optimal AD9244 perfor-
mance is achieved above 500 kHz by using the input transformer. To
drive the AD9244 via the transformer, connect solderable Jumpers
JP45 and JP46. DC bias is provided by the Resistors R8 and R28.
The evaluation board has positions for through-hole and surface-
mount transformers. For applications requiring lower frequencies
or dc applications, the AD8138 can be used. The AD8138 will
provide good distortion and noise performance, as well as input
buffering, up to 30 MHz. For more information, refer to the
AD8138 data sheet. To use the AD8138 to drive the AD9244,
remove the transformer (T1 or T4) and connect solderable
Jumpers JP42 and JP43. The AD9244 can be driven single-ended
directly via S3 and can be ac-coupled or dc-coupled by removing
or inserting JP5. To run the evaluation board in this way, remove
the transformer (T1 or T4) and connect solderable Jumpers
JP40 and JP41. The Resistors R40, R41, R8, and R28 are used
to bias the AD9244 inputs to the correct common-mode levels
in this application.
Reference Configuration
As described in the Analog Input and Reference Overview section
earlier in this data sheet, the AD9244 can be configured to use its
own internal or an external reference. An external reference, D3,
and reference buffer, U5, are included on the AD9244 evaluation
board. Jumpers JP8 and JP22
–
JP24 can be used to select the
desired reference configuration (Table VI).
Clock Configuration
The AD9244 evaluation board was designed to achieve optimal
performance as well as to be easily configurable by the user. To
configure the clock input, begin by connecting the correct com-
bination of solderable Jumpers JP11
–
JP15 (Table VII). The
specific jumper configuration is dependent on the application and
can be determined by referring to the clock input modes section.
If the differential clock input mode is selected, an external sine
wave generator applied to S5 can be used as the clock source.
The clock buffer/drive MC10EL16 from ON Semiconductor is
used on the evaluation board to buffer and square the clock input.
If the single-ended clock configuration is used, an external clock
source can be applied to S1.
The AD9244 evaluation board generates a buffered clock at
TTL/CMOS levels for use with a data capture system, such as the
HSC-ADC-EVAL-SC system. The clock buffering is provided
by U4 and U7 and is configured by Jumpers JP3, JP4, JP9, and
JP18 (Table VII).
For the digital decoupling shown in Figure 18, 0.1
μ
F ceramic
chip and 10
μ
F tantalum capacitors are appropriate. The decou-
pling capacitors (especially 0.1
μ
F) should be located as close to
the pins as possible. Reasonable capacitive loads on the data
pins are less than 20 pF per bit. Applications involving greater
digital loads should consider increasing the digital decoupling
and/or using external buffers/latches.
A complete decoupling scheme will also include large tantalum
or electrolytic capacitors on the power supply connector to reduce
low frequency ripple to insignificant levels.
AD9244
DGND
DRVDD
10 F
0.1 F
*
*
LOCATE AS CLOSE AS POSSIBLE TO SUPPLY PINS
+
Figure 18. Digital Supply Decoupling
CML
The AD9244 has a midsupply reference point. This is used within
the internal architecture of the AD9244 and must be decoupled
with a 0.1
μ
F capacitor. It will source or sink a load of up to
300
μ
A. If more current is required, the CML pin should be
buffered with an amplifier.
VR
VR is an internal bias point on the AD9244. It must be decoupled
to AGND with a 0.1
μ
F capacitor.
AD9244
CML
0.1 F
0.1 F
VR
Figure 19. CML/VR Decoupling
EVALUATION BOARD
Analog Input Configuration
Table V provides a summary of the analog input configuration.
The analog inputs of the AD9244 on the evaluation board can be
driven differentially through a transformer via Connector S4, or
the AD8138 amplifier via Connector S2, or driven single-ended
directly via Connector S3. When using the transformer or AD8138
amplifier, a single-ended source may be used as both of these
devices are configured on the AD9244 evaluation board to convert
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9244BSTRL-40 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:14-Bit, 40/65 MSPS Monolithic A/D Converter
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AD9244BSTZ40 制造商:Analog Devices 功能描述:
AD9244BSTZ-40 功能描述:IC ADC 14BIT 40MSPS 48-LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類(lèi)型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤(pán)（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類(lèi)型:8 個(gè)單端，單極 產(chǎn)品目錄頁(yè)面:892 (CN2011-ZH PDF) 其它名稱(chēng):296-25851-6
AD9244BSTZ-401 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:14-Bit, 40 MSPS/65 MSPS A/D Converter
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