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參數(shù)資料
| 型號(hào)： | AD8352ACPZ-R7 |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 8/20頁(yè) |
| 文件大小： | 0K |
| 描述： | IC AMP RF/IF DIFF 2GHZ 16-LFCSP |
| 產(chǎn)品培訓(xùn)模塊： | Differential Circuit Design Techniques for Communication Applications |
| 設(shè)計(jì)資源： | Using AD8352 as an Ultralow Distortion Differential RF/IF Front End for High Speed ADCs (CN0046) |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 放大器類型： | RF/IF 差分 |
| 電路數(shù)： | 1 |
| 輸出類型： | 差分 |
| 轉(zhuǎn)換速率： | 8000 V/µs |
| -3db帶寬： | 2.2GHz |
| 電流 - 輸入偏壓： | 75nA |
| 電流 - 電源： | 37mA |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 16-LFCSP-VQ |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁(yè)面： | 550 (CN2011-ZH PDF) |
| 其它名稱： | AD8352ACPZ-R7DKR |
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AD8352
Rev. B | Page 16 of 20
EVALUATION BOARD
An evaluation board is available for experimentation of various parameters such as gain, common-mode level, and distortion. The output
network can be configured for different loads via minor output component changes. The schematic and evaluation board artwork are
shown in Figure 38, Figure 39, and Figure 40. All discrete capacitors and resistors are Size 0402, except for C1 (3528-B).
Table 9. Evaluation Board Circuit Components and Functions
Component
Name
Function
Additional
Information
C8, C9, C10
Capacitors
C8, C9, and C10 are bypass capacitors.
C8 = C9 = C10 = 0.1 μF
RD, CD
Distortion
tuning
components
Distortion Adjustment Components. Allows for third-order distortion
adjustment HD3.
Typically, both are open
above 300 MHz
CD = 0.2 pF, RD = 4.32 kΩ
CD is Panasonic High-Q
(microwave) multilayer
chip 402 capacitor
R1, R2, R3,
R4, R5, R6,
T2, C2, C3
Resistors,
transformer,
capacitors
Input Interface. R1 and R4 ground one side of the differential drive interface
for single-ended applications. T2 is a 1-to-1 impedance ratio balun to transform a
single-ended input into a balanced differential signal. R2 and R3 provide
a differential 50 Ω input termination. R5 and R6 can be increased to reduce
gain peaking when driving from a high source impedance. The 50 Ω
termination provides an insertion loss of 6 dB. C2 and C3 provide ac-coupling.
R1 = open, R2 = 25 Ω,
R3 = 25 Ω, R4 = 0 Ω,
R5 = 0 Ω, R6 = 0 Ω,
T2 = M/A-COM ETC1-1-13,
C2 = 0.1 μF, C3 = 0.1 μF
R7, R8, R9,
R11, R12,
R13, R14,
T1, C4, C5
Resistors,
transformer,
capacitors
Output Interface. R13 and R14 ground one side of the differential output
interface for single-ended applications. T1 is a 1-to-1 impedance ratio balun to
transform a balanced differential signal to a single-ended signal. R8, R9, and
R12 are provided for generic placement of matching components. R7 and
R11 allow additional output series resistance when driving capacitive loads.
The evaluation board is configured to provide a 200 Ω to 50 Ω impedance
transformation with an insertion loss of 11.6 dB. C4 and C5 provide
ac-coupling. R7 and R11 provide additional series resistance when driving
capacitive loads.
R7 = 0 Ω, R8 = 86.6 Ω,
R9 = 57.6 Ω, R11 = 0 Ω,
R12 = 86.6 Ω, R13 = 0 Ω,
R14 = open,
T1 = M/A-COM ETC1-1-13,
C4 = 0.1 μF, C5 = 0.1 μF
RG
Resistor
Gain Setting Resistor. Resistor RG is used to set the gain of the device. Refer
RG = 115 Ω (Size 0402) for
a gain of 10 dB
SW1, R18,
R19, R20
Switch,
resistors
Enable Interface. R10 connects the enable pin, ENB, to the supply for constant
enable operation. The enable function can be toggled by removing R10 and
using SW1 to switch between enable and disable modes.
SW1 = installed
R18 = R19 = R20 = 0 Ω
C1, C6, C7
Capacitors
Power Supply Decoupling. The supply decoupling consists of a 10 μF capacitor
(C1) to ground. C6 and C7 are bypass capacitors.
C1 = 10 μF, C6 = 0.1 μF,
C7 = 0.1 μF
T3, T4,
C11, C12
Transformer,
capacitors
Calibration Circuit. T3 and T4 are dummy baluns which may be used to
calibrate the insertion loss across the transformers in the AD8352 signal chain.
T3 = T4 = M/A-COM ETC1-1-13
C11 = C12 = 0.1 μF
EVALUATION BOARD LOADING SCHEMES
The AD8352 evaluation board is characterized with two load
configurations representing the most common ADC input
resistance. The loads chosen are 200 Ω and 1000 Ω using a
broadband resistive match. The loading can be changed via R8,
R9, and R12 giving the flexibility to characterize the AD8352
evaluation board for the load in any given application. These
loads are inherently lossy and thus must be accounted for in
overall gain/loss for the entire evaluation board. Measure the
gain of the AD8352 with an oscilloscope using the following
procedure to determine the actual gain:
1. Measure the peak-to-peak voltage at the input node (C2 or C3).
2. Measure the peak-to-peak voltage at the output node (C4 or C5).
3. Compute gain using the following formula:
Gain = 20log(VOUT/VIN)
Table 10. Values Used for 200 Ω and 1000 Ω Loads
Component
200 Ω Load (Ω)
1000 Ω Load (Ω)
R8
86.6
487
R9
57.6
51.1
R12
86.6
487
SOLDERING INFORMATION
On the underside of the chip scale package, there is an exposed
compressed paddle. This paddle is internally connected to the
ground of the chip. Solder the paddle to the low impedance
ground plane on the PCB to ensure the specified electrical
performance and to provide thermal relief. To further reduce
thermal impedance, it is recommended that the ground planes
on all layers under the paddle be stitched together with vias.
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| AD8352ACPZ-WP | 制造商:Analog Devices 功能描述:SP Amp DIFF AMP Single 5.5V 16-Pin LFCSP EP Tray 制造商:Analog Devices 功能描述:SP AMP DIFF AMP SGL 5.5V 16LFCSP EP - Waffle Pack 制造商:Analog Devices 功能描述:AMP DIFF RF/IF SMD LFCSP-16 8352 |
| AD8352-EVAL | 制造商:Analog Devices 功能描述:EVALUATION BOARD FOR AD8352 - Bulk |
| AD8352-EVALZ | 制造商:Analog Devices 功能描述:EVAL BD OF AD8352 - Bulk |
| AD8353 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 MHz to 2.7 GHz RF Gain Block |
| AD8353_05 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 MHz to 2.7 GHz RF Gain Block |
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