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參數(shù)資料
| 型號(hào)： | AD7942BRMZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 7/24頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT 250KSPS 10-MSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | PulSAR® |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 250k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 1.25mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個(gè)偽差分，單極 |
| 配用： | EVAL-AD7942CB-ND - BOARD EVALUATION FOR AD7942 |
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AD7942
Rev. B | Page 15 of
24
CM
RR
(
d
B)
40
50
60
70
80
FREQUENCY (kHz)
10
1
100
1000
10000
VDD = 5V
04
65
7-
0
25
Figure 25. Analog Input CMRR vs. Frequency
During the acquisition phase, the impedance of the analog
input, IN+, can be modeled as a parallel combination of the
Capacitor CPIN and the network formed by the series connection
of RIN and CIN. CPIN is primarily the pin capacitance. RIN is typi-
cally 3 kΩ and is a lumped component made up of some serial
resistors and the on resistance of the switches. CIN is typically
30 pF and is mainly the ADC sampling capacitor. During the
conversion phase, when the switches are opened, the input imped-
ance is limited to CPIN. RIN and CIN make a 1-pole, low-pass filter
that reduces undesirable aliasing effects and limits the noise.
When the source impedance of the driving circuit is low, the
AD7942 can be driven directly. Large source impedances sig-
nificantly affect the ac performance, especially total harmonic
distortion (THD). The dc performances are less sensitive to the
input impedance. The maximum source impedance depends on
the amount of THD that can be tolerated. The THD degrades as
a function of the source impedance and the maximum input
frequency, as shown in Figure 26.
–115
–110
–105
–100
–95
–90
–85
–80
–75
–70
TH
D
(
d
B
)
FREQUENCY (kHz)
25
0
50
75
100
04
65
7-
02
6
RS = 15
RS = 50
RS = 100
RS = 250
RS = 500
RS = 1k
Figure 26. THD vs. Analog Input Frequency and Source Resistance
Driver Amplifier Choice
Although the AD7942 is easy to drive, the driver amplifier
needs to meet the following requirements:
The noise generated by the driver amplifier needs to be
kept as low as possible to preserve the SNR and transition
noise performance of the AD7942. Note that the AD7942
produces much less noise than most other 14-bit ADCs
and therefore can be driven by a noisier op amp while
preserving the same or better system performance. The
noise coming from the driver is filtered by the AD7942
analog input circuit, 1-pole, low-pass filter made by RIN
and CIN or by the external filter, if one is used.
For ac applications, the driver needs to have a THD
performance suitable to that of the AD7942. Figure 14
gives the THD vs. frequency that the driver should exceed.
For multichannel multiplexed applications, the driver
amplifier and the AD7942 analog input circuit must be
able to settle for a full-scale step of the capacitor array at a
14-bit level (0.006%). In the amplifier data sheet, settling at
0.1% to 0.01% is more commonly specified. This could
differ significantly from the settling time at a 14-bit level
and should be verified prior to driver selection.
Table 8. Recommended Driver Amplifiers
Amplifier
Typical Application
Very low noise, small, and low power
Very low noise and high frequency
Low noise and high frequency
Low power, low noise, and low frequency
5 V single supply, low power
Small, low power, and low frequency
High frequency and low power
Voltage Reference Input
The AD7942 voltage reference input, REF, has a dynamic input
impedance and should therefore be driven by a low impedance
source with efficient decoupling between the REF and GND
pins, as explained in the Layout section.
When REF is driven by a very low impedance source (for example,
(X5R, 0805 size) ceramic chip capacitor is appropriate for
optimum performance.
If an unbuffered reference voltage is used, the decoupling value
depends on the reference used. For instance, a 22 μF (X5R,
1206 size) ceramic chip capacitor is appropriate for optimum
performance, using a low temperature drift ADR43x reference.
If desired, smaller reference decoupling capacitor values
≥ 2.2 μF can be used with a minimal impact on performance,
especially on DNL.
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