參數(shù)資料
型號(hào)： AD7933
廠商： ANALOG DEVICES INC
元件分類(lèi)： ADC
英文描述： 4-Channel, 1.5 MSPS, 12-Bit and 10-Bit Parallel ADCs with a Sequencer
中文描述： 4-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO28
封裝： TSSOP-28
文件頁(yè)數(shù)： 27/32頁(yè)
文件大?。?/td> 1253K
代理商： AD7933
Preliminary Technical Data
AD7933/AD7934
POWER MODES OF OPERATION
The AD7933/AD7934 have four different power modes of
operation. These modes are designed to provide flexible power
management options. Different options can be chosen to
optimize the power dissipation/throughput rate ratio for
differing applications. The mode of operation is selected by the
power management bits, PM1 and PM0, in the control register,
as detailed in
. When power is first applied to the
AD7933/AD7934 an on-chip, power-on reset circuit ensures the
default power-up condition is normal mode.
Table 8
Note that, after power-on, track-and-hold is in hold mode and
the first rising edge of CONVST places the track-and-hold into
track mode.
Normal Mode (PM1 = PM0 = 0)
This mode is intended for the fastest throughput rate
performance because the user does not have to worry about any
power-up times because the AD7933/AD7934 remain fully
powered up at all times. At power-on reset, this mode is the
default setting in the control register.
Auto Shutdown (PM1 = 0; PM0 = 1)
In this mode of operation, the AD7933/AD7934 automatically
enter full shutdown at the end of each conversion, which is
shown at Point A in
. In shutdown mode, all internal
circuitry on the device is powered. The part retains information
in the control register during shutdown. It remains in shutdown
mode until the next rising edge of CONVST (see Point B in
). In order to keep the device in shutdown for as long
as possible, CONVST should idle low between conversions as
shown in
. On this rising edge, the part begins to
power-up and track-and-hold returns to track mode. The
power-up time required depends on whether the user is
operating with the internal or external reference. With the
internal reference, the power-up time is typically TBD, and with
an external reference, the power-up time is typically TBD. The
user should ensure that the power-up time has elapsed before
initiating a conversion.
Auto Standby (PM1 = 1; PM0 = 0)
In this mode of operation, the AD7933/AD7934 automatically
enter standby mode at the end of each conversion. When this
mode is entered, all circuitry on the AD7933/AD7934 is
powered down except for the reference and reference buffer.
Also, track-and-hold goes into hold at this point and remains in
hold as long as the device is in standby The part remains in
standby until the next rising edge of CONVST powers up the
device, which takes at least TBD. The user should ensure this
power-up time has elapsed before initiating another conversion,
as shown in
. This rising edge of CONVST also places
track-and-hold back into track mode.
Full Shutdown Mode (PM1 = 1; PM0 = 1)
When this mode is entered, all circuitry on the
AD7933/AD7934 is powered down upon completion of the
write operation, i.e., on rising edge of WR. The part retains the
information in the control register while the part is in
shutdown. The AD7933/AD7934 remain in full shutdown
mode, and track-and-hold in hold mode, until the power
management bits (PM1 and PM0) in the control register are
changed. If a write to the control register occurs while the part
is in full shutdown mode, and the power management bits are
changed to PM0 = PM1 = 0, i.e., normal mode, the part begins
to power up on the WR rising edge and the track and hold
returns to track.. To ensure the part is fully powered up before a
conversion is initiated, the power-up time, TBD, should be
allowed before the CONVST falling edge; otherwise, invalid
data is read.
Figure 37
Figure 37
Figure 41
Figure 41
Figure 41. Auto-Shutdown/Auto-Standby Mode
t
POWER-UP
1
1
14
14
BUSY
CLKIN
CONVST
0
A
B
Rev. PrG | Page 27 of 32
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