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參數(shù)資料
| 型號： | AD7933 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 4-Channel, 1.5 MSPS, 12-Bit and 10-Bit Parallel ADCs with a Sequencer |
| 中文描述： | 4-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | TSSOP-28 |
| 文件頁數(shù)： | 20/32頁 |
| 文件大?。?/td> | 1253K |
| 代理商： | AD7933 |
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AD7933/AD7934
Preliminary Technical Data
0.47
μ
F
+1.25V
V
IN
R
R
3R
0V
–1.25V
+2.5V
0V
V
IN0
V
IN3
V
REFOUT
AD7933/
AD7934*
*ADDITIONAL PINS OMITTED FOR CLARITY
0
Figure 24. THD vs. Analog Input Frequency for Various Source Impedances
Figure 25 shows a graph of the THD versus the analog input
frequency for various supplies, while sampling at 1.5 MHz with
an SCLK of 20 MHz. In this case, the source impedance is 10 .
Figure 25. THD vs. Analog Input Frequency for Various Supply Voltages
ANALOG INPUTS
The AD7933/AD7934 have software selectable analog input
configurations. Users can choose either four single-ended
inputs, two fully differential pairs, or two pseudo-differential
pairs. The analog input configuration is chosen with Bits
MODE0/MODE1 in the internal control register (see
Single-Ended Mode
The AD7933/AD7934 can have four single-ended analog input
channels by setting the MODE0 and MODE1 bits in the control
register both to 0. In applications where the signal source has a
high impedance, it is recommended to buffer the analog input
before applying it to the ADC. The analog input range is either 0
to V
REF
or 0 to 2 × V
REF
.
).
Table 9
If the analog input signal to be sampled is bipolar, the internal
reference of the ADC can be used to externally bias up this
signal to make it of the correct format for the ADC.
Figure 26
the ADC in single-ended mode.
Figure 26. Single-Ended Mode Connection Diagram
Differential Mode
The AD7933/AD7934 can have two differential analog input
pairs by setting Bits MODE0 and MODE1 in the control
register to 0 and 1, respectively.
Differential signals have some benefits over single-ended
signals, including noise immunity based on the device’s
common-mode rejection and improvements in distortion
performance. F
defines the fully differential analog
input of the AD7933/AD7934.
igure 27
Figure 27. Differential Input Definition
0
V
REF
p-p
V
IN+
V
IN–
REF
V
*ADDITIONAL PINS OMITTED FOR CLARITY
AD7933/
AD7934*
COMMON-MODE
VOLTAGE
The amplitude of the differential signal is the difference
between the signals applied to the V
IN+
and V
IN
pins in each
differential pair (i.e., V
IN+
V
IN
). V
IN+
and V
IN
should be
simultaneously driven by two signals, each of amplitude V
REF
that are 180° out of phase. The amplitude of the differential
signal is therefore V
REF
to +V
REF
peak-to-peak (i.e., 2 × V
REF
).
This is regardless of the common mode (CM). The common
mode is the average of the two signals, i.e. (V
IN+
+ V
IN
)/2, and is
therefore the voltage that the two inputs are centered on. This
results in the span of each input being CM ± V
REF
/2. This
voltage has to be set up externally and its range varies with V
REF
.
As the value of V
REF
increases, the common-mode range
decreases. When driving the inputs with an amplifier, the actual
common-mode range is determined by the amplifier’s output
voltage swing.
Figure 28 and Figure 29 show how the common-mode range
typically varies with V
REF
for both a 5 V and a 3 V power supply.
The common mode must be in this range to guarantee the
functionality of the AD7933/AD7934.
shows a typical connection diagram when operating
Rev. PrG | Page 20 of 32
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