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參數(shù)資料
| 型號(hào)： | AD7851KRZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 21/36頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT SRL 333KSPS 24-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 333k |
| 數(shù)據(jù)接口： | 8051，QSPI?，串行，SPI? µP |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 89.25mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個(gè)偽差分，單極；1 個(gè)偽差分，雙極 |
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AD7851
–28–
REV. B
If the user has control of the
CONVST pin but does not want to
exercise it for every conversion, the control register may be used
to start a conversion. Setting the
CONVST bit in the control
register to 1 starts a conversion. If the user does not have con-
trol of the
CONVST pin, a conversion should not be initiated
by writing to the control register. The reason for this is that the
user may get locked out and not be able to perform any further
write/read operations. When a conversion is started by writing to
the control register, the
SYNC goes low and read/write opera-
tions take place while the conversion is in progress. However,
once the conversion is complete, there is no way of writing to
the part unless the
CONVST pin is exercised. The CONVST
signal triggers the
SYNC signal low which allows read/write
operations to take place.
SYNC must be low to perform read/
write operations. The
SYNC is triggered low by the CONVST
signal rising edge or by setting the
CONVST bit in the control
register to 1. Therefore, if there is not full control of the
CONVST pin, the user may become locked out.
SERIAL
INTERFACE
MODE
?
POWER ON, APPLY CLKIN SIGNAL,
WAIT FOR AUTOMATIC CALIBRATION
DIN CONNECTED TO DGND
NO
YES
START
WAIT FOR BUSY SIGNAL
TO GO LOW
PULSE
CONVST PIN
READ
DATA
DURING
CONVERSION
?
WAIT APPROXIMATELY 200ns
AFTER
CONVST RISING EDGE
APPLY
SYNC (IF REQUIRED), SCLK, AND READ
CONVERSION RESULT ON DOUT PIN
PULSE
CONVST PIN
SYNC AUTOMATICALLY GOES LOW
AFTER
CONVST RISING EDGE
SCLK AUTOMATICALLY ACTIVE, READ
CONVERSION RESULT ON DOUT PIN
4, 5
2, 3
Figure 40. Flowchart for Setting Up and Reading from the AD7851
CONFIGURING THE AD7851
AD7851 as a Read-Only ADC
The AD7851 contains 14 on-chip registers that can be accessed
via the serial interface. In the majority of applications, it will not
be necessary to access all of these registers. Figure 40 outlines the
sequence used to configure the AD7851 as a read-only ADC. In
this case, there is no writing to the on-chip registers and only the
conversion result data is read from the part. Interface Mode 1
cannot be used in this case as it is necessary to write to the con-
trol register to set Interface Mode 1. Here the CLKIN signal is
applied directly after power-on; the CLKIN signal must be
present to allow the part to perform a calibration. This automatic
calibration will be completed approximately 42 ms after the
AD7851 has powered up (6 MHz CLK).
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參數(shù)描述 |
|---|---|
| AD7851KRZ-REEL3 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit 333 kSPS Serial A/D Converter |
| AD7853 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| AD7853AN | 制造商:Analog Devices 功能描述:ADC Single SAR 200ksps 12-bit Serial 24-Pin PDIP 制造商:Analog Devices 功能描述:ADC SGL SAR 200KSPS 12-BIT SERL 24PDIP - Rail/Tube 制造商:Rochester Electronics LLC 功能描述:SELF CAL.SERIAL 12-BIT ADC I.C. - Bulk 制造商:Analog Devices 功能描述:3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| AD7853ANZ | 功能描述:IC ADC 12BIT SRL 200KSPS 24-DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| AD7853AR | 制造商:Analog Devices 功能描述:ADC Single SAR 200ksps 12-bit Serial 24-Pin SOIC W 制造商:Rochester Electronics LLC 功能描述:SELF CAL.SERIAL 12-BIT ADC I.C. - Bulk |
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