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參數資料
| 型號： | AD7715 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 3 V/5 V, 450 mA 16-Bit, Sigma-Delta ADC(16位∑△A/D轉換器) |
| 中文描述： | 3伏/ 5伏，450毫安16位Σ-Δ模數轉換器（16位Σ△的A / D轉換器） |
| 文件頁數： | 3/31頁 |
| 文件大小： | 254K |
| 代理商： | AD7715 |
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Parameter
A Version
1
Units
Conditions/Comments
STATIC PERFORMANCE
No Missing Codes
Output Noise
Integral Nonlinearity
Unipolar Offset Error
Unipolar Offset Drift
3
Bipolar Zero Error
Bipolar Zero Drift
3
Positive Full-Scale Error
4
Full-Scale Drift
3, 5
Gain Error
6
Gain Drift
3, 7
Bipolar Negative Full-Scale Error
2
Bipolar Negative Full-Scale Drift
3
16
See Tables IX to XII
±
0.0015
See Note 2
0.2
See Note 2
0.2
See Note 2
0.2
See Note 2
0.2
±
0.003
1
0.6
Bits min
Guaranteed by Design. Filter Notch
≤
60Hz
Depends on Filter Cutoffs and Selected Gain
Filter Notch
≤
60Hz
% of FSR max
μ
V/
°
C typ
μ
V/
°
C typ
μ
V/
°
C typ
ppm of FSR/
°
C typ
% of FSR max
μ
V/
°
C typ
μ
V/
°
C typ
Typically
±
0.0004%
For Gains of 1 and 2
For Gains of 32 and 128
ANALOG INPUTS/REFERENCE INPUTS
Input Common-Mode Rejection (CMR)
Normal-Mode 50 Hz Rejection
8
Normal-Mode 60 Hz Rejection
8
Common-Mode 50 Hz Rejection
8
Common-Mode 60 Hz Rejection
8
Common-Mode Voltage Range
9
Absolute AIN/REF IN Voltage
8
Specifications for AIN and REF IN Unless Noted
at DC. Typically 102 dB
For Filter Notches of 25 Hz, 50 Hz,
±
0.02
×
f
NOTCH
For Filter Notches of 20 Hz, 60 Hz,
±
0.02
×
f
NOTCH
For Filter Notches of 25 Hz, 50 Hz,
±
0.02
×
f
NOTCH
For Filter Notches of 20 Hz, 60 Hz,
±
0.02
×
f
NOTCH
AIN for BUF Bit of Setup Register = 0 and REF IN
AIN for BUF Bit of Setup Register = 0 and REF IN
90
98
98
150
150
AGND to AV
DD
AGND – 30 mV
AV
DD
+ 30mV
AGND + 50mV
AV
DD
– 1.5V
1
10
0 to +V
REF
/GAIN
11
±
V
REF
/GAIN
GAIN
×
f
CLKIN
/64
f
CLKIN
/8
+1.25
f
CLK IN
/64
dB min
dB min
dB min
dB min
dB min
V min to V max
V min
V max
V min
V max
nA max
pF max
nom
nom
Absolute/Common-Mode AIN Voltage
9
BUF Bit of Setup Register = 1
AIN DC Input Current
8
AIN Sampling Capacitance
8
AIN Differential Voltage Range
10
Unipolar Input Range (B/U Bit of Setup Register = 1)
Bipolar Input Range (B/U Bit of Setup Register = 0)
For Gains of 1 and 2
For Gains of 32 and 128
±
1% for Specified Performance. Functional with Lower V
REF
AIN Input Sampling Rate, f
S
REF IN(+) – REF IN(–) Voltage
REF IN Input Sampling Rate, f
S
V nom
LOGIC INPUTS
Input Current
All Inputs Except MCLK IN
V
INL
, Input Low Voltage
V
INH
, Input High Voltage
MCLK IN Only
V
INL
, Input Low Voltage
V
INH
, Input High Voltage
±
10
μ
A max
0.8
2.0
V max
V min
0.4
2.5
V max
V min
LOGIC OUTPUTS (Including MCLK OUT)
V
OL
, Output Low Voltage
V
OH
, Output High Voltage
Floating State Leakage Current
Floating State Output Capacitance
13
Data Output Coding
0.4
DV
DD
– 0.6
±
10
9
Binary
Offset Binary
V max
V min
μ
A max
pF typ
I
SINK
= 100
μ
A Except for MCLK OUT
12
I
SOURCE
= 100
μ
A Except for MCLK OUT
12
Unipolar Mode
Bipolar Mode
AD7715
AD7715-3–SPECIFICATIONS
(AV
DD
= +3V, DV
DD
= +3 V, REF IN (+) = +1.25V; REFIN(–) = AGND;
f
CLK IN
= 2.4576MHz unless otherwise noted. All specifications T
MIN
to T
MAX
unless otherwise noted.)
–3–
REV. B
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD7715_10 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V/5 V, 450 ??A 16-Bit, Sigma-Delta ADC |
| AD7715-5EB | 制造商:Analog Devices 功能描述: |
| AD7715ACHIPS-3 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC |
| AD7715ACHIPS-5 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC |
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