參數(shù)資料
型號(hào)： AD7711AAR
廠商： ANALOG DEVICES INC
元件分類： ADC
英文描述： LC2MOS Signal Conditioning ADC with RTD Current Source
中文描述： 2-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO24
封裝： SOIC-24
文件頁(yè)數(shù)： 8/27頁(yè)
文件大?。?/td> 222K
代理商： AD7711AAR
REV. C
AD7711A
–8–
Pin
Mnemonic
Function
19
TFS
Transmit Frame Synchronization. Active low logic input used to write serial data to the device with serial data
expected after the falling edge of this pulse. In the self-clocking mode, the serial clock becomes active after
TFS
goes low. In the external clocking mode,
TFS
must go low before the first bit of the data word is written
to the part.
Receive Frame Synchronization. Active low logic input used to access serial data from the device. In the
self-clocking mode, the SCLK and SDATA lines both become active after
RFS
goes low. In the external
clocking mode, the SDATA line becomes active after
RFS
goes low.
Logic Output. A falling edge indicates that a new output word is available for transmission. The
DRDY
pin
will return high upon completion of transmission of a full output word.
DRDY
is also used to indicate when
the AD7711A has completed its on-chip calibration sequence.
Serial Data. Input /Output with serial data being written to either the control register or the calibration
registers and serial data being accessed from the control register, calibration registers or the data register.
During an output data read operation, serial data becomes active after
RFS
goes low (provided
DRDY
is low).
During a write operation, valid serial data is expected on the rising edges of SCLK when
TFS
is low. The
output data coding is natural binary for unipolar inputs and offset binary for bipolar inputs.
Digital Supply Voltage, +5 V. DV
DD
should not exceed AV
DD
by more than 0.3 V in normal operation.
Ground reference point for digital circuitry.
20
RFS
21
DRDY
22
SDATA
23
DV
DD
DGND
24
TERMINOLOGY
INTEGRAL NONLINEARITY
This is the maximum deviation of any code from a straight line
passing through the endpoints of the transfer function. The end-
points of the transfer function are zero-scale (not to be confused
with bipolar zero), a point 0.5 LSB below the first code transi-
tion (000 . . . 000 to 000 . . . 001) and full scale, a point 0.5 LSB
above thelast code transition (111 . . . 110 to 111 . . . 111). The
error is expressed as a percentage of full scale.
POSITIVE FULL-SCALE ERROR
Positive Full-Scale Error is the deviation of the last code transi-
tion (111 . . . 110 to 111 . . . 111) from the ideal AIN(+) voltage
(AIN(–) + V
REF
/GAIN – 3/2 LSBs). It applies to both unipolar
and bipolar analog input ranges.
UNIPOLAR OFFSET ERROR
Unipolar Offset Error is the deviation of the first code transition
from the ideal AIN(+) voltage (AIN(–) + 0.5 LSB) when oper-
ating in the unipolar mode.
BIPOLAR ZERO ERROR
This is the deviation of the midscale transition (0111 . . . 111
to 1000 . . . 000) from the ideal AIN(+) voltage (AIN(–)
– 0.5 LSB) when operating in the bipolar mode.
BIPOLAR NEGATIVE FULL-SCALE ERROR
This is the deviation of the first code transition from the ideal
AIN(+) voltage (AIN(–) – V
REF
/GAIN + 0.5LSB), when oper-
ating in the bipolar mode.
POSITIVE FULL-SCALE OVERRANGE
Positive Full-Scale Overrange is the amount of overhead avail-
able to handle input voltages on AIN(+) input greater than
AIN(–) + V
REF
/GAIN (for example, noise peaks or excess volt-
ages due to system gain errors in system calibration routines)
without introducing errors due to overloading the analog modu-
lator or overflowing the digital filter.
NEGATIVE FULL-SCALE OVERRANGE
This is the amount of overhead available to handle voltages on
AIN(+) below AIN(–) – V
REF
/GAIN without overloading the
analog modulator or overflowing the digital filter. Note that the
analog input will accept negative voltage peaks even in the uni-
polar mode provided that AIN(+) is greater than AIN(–) and
greater than V
SS
– 30mV.
OFFSET CALIBRATION RANGE
In the system calibration modes, the AD7711A calibrates its
offset with respect to the analog input. The Offset Calibration
Range specification defines the range of voltages that the
AD7711A can accept and still accurately calibrate offset.
FULL-SCALE CALIBRATION RANGE
This is the range of voltages that the AD7711A can accept in
the system calibration mode and still correctly calibrate full-scale.
INPUT SPAN
In system calibration schemes, two voltages applied in sequence
to the AD7711A’s analog input define the analog input range.
The input span specification defines the minimum and maxi-
mum input voltages from zero to full-scale that the AD7711A
can accept and still calibrate accurately gain.
相關(guān)PDF資料
PDF描述
AD7711ASQ LC2MOS Signal Conditioning ADC with RTD Current Source
AD7711A* LC2MOS Signal Conditioning ADC with RTD Current Source
AD7711AN LC2MOS Signal Conditioning ADC with RTD Excitation Currents
AD7711AQ LC2MOS Signal Conditioning ADC with RTD Excitation Currents
AD7711AR LC2MOS Signal Conditioning ADC with RTD Excitation Currents
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD7711AARZ 功能描述:IC ADC 24BIT RTD I SOURCE 24SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個(gè)單端，單極；2 個(gè)差分，單極 產(chǎn)品目錄頁(yè)面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6
AD7711AN 功能描述:IC ADC 24BIT RTD I SOURCE 24-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:-
AD7711ANZ 功能描述:IC ADC 24BIT RTD I SOURCE 24-DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個(gè)單端，單極；2 個(gè)差分，單極 產(chǎn)品目錄頁(yè)面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6
AD7711ANZ 制造商:Analog Devices 功能描述:IC ADC 24-BIT SIGMA DELTA
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