參數(shù)資料
型號(hào)： AD7610BSTZ-RL
廠商： Analog Devices Inc
文件頁數(shù)： 22/32頁
文件大?。?/td> 0K
描述： IC ADC 16BIT 250KSPS 48-LQFP
標(biāo)準(zhǔn)包裝： 2,000
系列： PulSAR®
位數(shù)： 16
采樣率（每秒）： 250k
數(shù)據(jù)接口： 串行，并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 110mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 1 個(gè)差分，單極；1 個(gè)差分，雙極
Data Sheet
AD7610
Rev. A | Page 29 of 32
SCIN
SCCLK
X
START
TEN
1
2
3
6
7
BUSY
HW/SW = 0
INVSCLK = 0
CNVST
SCCS
4
PD
5
BIPOLAR
X
OB/2C
X
8
9
SER/PAR = 1
BIP = 0 OR 1
TEN = 0 OR 1
IMPULSE = 0 OR 1
WARP = 0 OR 1
PD = 0
t31
t33
t34
X
t35
t36
t37
t31
t8
06395-
045
Figure 45. Serial Configuration Port Timing
MICROPROCESSOR INTERFACING
The AD7610 is ideally suited for traditional dc measurement appli-
cations supporting a microprocessor, and ac signal processing
applications interfacing to a digital signal processor. The AD7610 is
designed to interface with a parallel 8-bit or 16-bit wide inter-
face, or with a general-purpose serial port or I/O ports on a micro-
controller. A variety of external buffers can be used with the
AD7610 to prevent digital noise from coupling into the ADC.
SPI Interface
The AD7610 is compatible with SPI and QSPI digital hosts
and DSPs such as Blackfin ADSP-BF53x and ADSP-218x/
ADSP-219x. Figure 46 shows an interface diagram between the
AD7610 and the SPI-equipped ADSP-219x. To accommodate
the slower speed of the DSP, the AD7610 acts as a slave device, and
data must be read after conversion. This mode also allows the
daisy-chain feature. The convert command could be initiated
in response to an internal timer interrupt.
The reading process can be initiated in response to the end-of-
conversion signal (BUSY going low) using an interrupt line of
the DSP. The serial peripheral interface (SPI) on the ADSP-219x
is configured for master mode (MSTR) = 1, clock polarity bit
(CPOL) = 0, clock phase bit (CPHA) = 1, and SPI interrupt enable
(TIMOD) = 0 by writing to the SPI control register (SPICLTx).
It should be noted that to meet all timing requirements, the SPI
clock should be limited to 17 Mbps allowing it to read an ADC
result in less than 1 s. When a higher sampling rate is desired,
use one of the parallel interface modes.
BUSY
CS
SDOUT
SCLK
CNVST
AD7610*
PFx
SPIxSEL (PFx)
MISOx
SCKx
PFx OR TFSx
ADSP-219x*
*ADDITIONAL PINS OMITTED FOR CLARITY.
DVDD
SER/PAR
EXT/INT
RD
INVSCLK
06395-
046
Figure 46. Interfacing the AD7610 to SPI Interface
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