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參數(shù)資料
| 型號： | AD6816 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Interface For ATM User-Network Interface IC to Category #5 Unshielded Twisted Pair (UTP) system or a fiber optic system.(ATM用戶網(wǎng)絡(luò)接口與#5類非屏蔽雙絞線系統(tǒng)或其他光纖系統(tǒng)的接口芯片) |
| 文件頁數(shù)： | 17/20頁 |
| 文件大小： | 483K |
| 代理商： | AD6816 |
AD6816
–17–
REV. A
Four-Channel ATM UNI PHY
Figure 29 shows a block diagram of the AD6816 and one channel
of the IgT WAC-413 Quad ATM UNI Processor. The AD6816
provides the WAC-413 with a 155 MHz Tx clock at 5 V
PECL levels. The 5 V PECL levels are level-shifted using
a 3-resistor network (Figure 30) to drive the WAC-413
TX_SER_CLK
±
inputs. The WAC-413 processes 155 Mbps
data directly from this 155 MHz clock. The WAC-413 gener-
ates 155 Mbps differential NRZ data at 3.3 V PECL levels.
The 3.3 V PECL signals are level-shifted to 5 V PECL using a
3-resistor network (Figure 31) to drive the AD6816 line driver.
The AD6816 processes the NRZ data through its line driver. The
line driver output data is processed through an external low-pass
filter and transformer before entering the RJ45 connector.
In the receive section, the NRZ data enters the RJ45 connector
and passes through an isolation transformer and band-limiting
filter. The adaptive equalizer in the AD6816 compensates for
the amplitude and phase distortion incurred from up to 110M
UTP#5. The AD6816 baseline restoration loop compensates for
the dc wander that the transformer introduces to its input data.
Once the signal has been equalized and had its dc level restored,
the AD6816 recovers clock and retimes data. The AD6816 pro-
duces a 5 V PECL differential recovered clock signal and a 5 V
PECL retimed differential data signal that get level shifted using
a three resistor network (Figure 30) to drive the WAC-413
RX_SER_CLK
±
and RX_SER_DATA
±
inputs, respectively.
TX_SER_CLK+
RX_SER_DATA+
RX_SER_CLK+
I
T
WAC-413
QUAD
155Mbps
SONET ATM UNI
PROCESSOR
TXCLKOUT
RXDATAOUT
RXCLKOUT
AD6816
(1/4)
TX_SER_CLK–
RX_SER_DATA–
RX_SER_CLK–
91
91
51
TRANSMISSION LINE
(50
PCB TRACE)
0.01μF
FERRITE BEAD
+5V
62
62
51
NOTE:
TO ENSURE PROPER IMPEDANCE
MATCHING, ALL COMPONENTS
SHOULD BE PLACED AS CLOSE
TO THE WAC-413 DESTINATION
PINS AS POSSIBLE.
TXCLKOUTN
RXDATAOUTN
RXCLKOUTN
PECL 5V
Figure 30. AD6816 5 V PECL to WAC-413 3.3 V PECL Resistor Network
AD6816
DRIVEIN
DRIVEINN
100
100
51
TRANSMISSION LINE
(50
PCB TRACE)
0.01μF
FERRITE BEAD
+5V
75
75
PECL 5V
TS_SER_DATA+
I
T
WAC-413
QUAD
155Mbps
SONET ATM UNI
PROCESSOR
(1/4)
TS_SER_DATA–
51
NOTE:
TO ENSURE PROPER IMPEDANCE
MATCHING, ALL COMPONENTS
SHOULD BE PLACED AS CLOSE
TO THE WAC-413 DESTINATION
PINS AS POSSIBLE.
Figure 31. WAC-413 3.3 V PECL to AD6816 5 V PECL Resistor Network
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