參數(shù)資料
型號(hào): AD5542ABCPZ-REEL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 6/24頁(yè)
文件大?。?/td> 0K
描述: IC DAC 16BIT SRL 16LFCSP
設(shè)計(jì)資源: High Precision Digital-to-Analog Conversion Using the 16-Bit AD5542/1, ADR421, and AD8628 (CN0079)
How to Achieve High Precision Voltage Level Setting Using AD5541A/42A (CN0169)
標(biāo)準(zhǔn)包裝: 1
系列: nanoDAC™
設(shè)置時(shí)間: 1µs
位數(shù): 16
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 825µW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-WFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 16-LFCSP
包裝: 標(biāo)準(zhǔn)包裝
輸出數(shù)目和類型: *
采樣率(每秒): *
其它名稱: AD5542ABCPZ-REEL7DKR
AD5512A/AD5542A
Rev. A | Page 14 of 24
TERMINOLOGY
Relative Accuracy or Integral Nonlinearity (INL)
For the DAC, relative accuracy or INL is a measure of the
maximum deviation, in LSBs, from a straight line passing
through the endpoints of the DAC transfer function. A typical
INL vs. code plot is shown in Figure 7.
Differential Nonlinearity (DNL)
DNL is the difference between the measured change and the
ideal 1 LSB change between any two adjacent codes. A specified
differential nonlinearity of ±1 LSB maximum ensures mono-
tonicity. A typical DNL vs. code plot is shown in Figure 10.
Gain Error
Gain error is the difference between the actual and ideal analog
output range, expressed as a percent of the full-scale range.
It is the deviation in slope of the DAC transfer characteristic
from ideal.
Gain Error Temperature Coefficient
Gain error temperature coefficient is a measure of the change
in gain error with changes in temperature. It is expressed in
ppm/°C.
Zero-Code Error
Zero-code error is a measure of the output error when zero
code is loaded to the DAC register.
Zero-Code Temperature Coefficient
This is a measure of the change in zero-code error with a
change in temperature. It is expressed in mV/°C.
Digital-to-Analog Glitch Impulse
Digital-to-analog glitch impulse is the impulse injected into the
analog output when the input code in the DAC register changes
state. It is normally specified as the area of the glitch in nV-sec
and is measured when the digital input code is changed by
1 LSB at the major carry transition. A digital-to-analog glitch
impulse plot is shown in Figure 20.
Digital Feedthrough
Digital feedthrough is a measure of the impulse injected into
the analog output of the DAC from the digital inputs of the
DAC, but it is measured when the DAC output is not updated.
CS
Power Supply Rejection Ratio (PSRR)
is held high while the SCLK and DIN signals are toggled. It
is specified in nV-sec and is measured with a full-scale code
change on the data bus, that is, from all 0s to all 1s and vice
versa. A typical digital feedthrough plot is shown in Figure 19.
PSRR indicates how the output of the DAC is affected by changes
in the power supply voltage. The power supply rejection ratio is
quoted in terms of percent change in output per percent change
in VDD for full-scale output of the DAC. VDD is varied by ±10%.
Reference Feedthrough
Reference feedthrough is a measure of the feedthrough from the
VREF input to the DAC output when the DAC is loaded with all 0s.
A 100 kHz, 1 V p-p is applied to VREF. Reference feedthrough is
expressed in mV p-p.
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