參數(shù)資料
型號(hào): A43E06321G-75F
廠商: AMIC Technology Corporation
英文描述: General Purpose
中文描述: 為512k × 32位× 2銀行低功耗同步DRAM
文件頁(yè)數(shù): 8/46頁(yè)
文件大?。?/td> 1351K
代理商: A43E06321G-75F
A43E06321
PRELIMINARY
(July, 2005, Version 0.0)
7
AMIC Technology, Corp.
Operating AC Parameter
(AC operating conditions unless otherwise noted)
Version
Symbol
Parameter
-75
-95
Unit
Note
t
RRD(min)
Row active to row active delay
15
19
ns
1
t
RCD(min)
RAS to
CAS
delay
20
24
ns
1
t
RP(min)
Row precharge time
20
24
ns
1
t
RAS(min)
50
50
ns
1
t
RAS(max)
Row active time
100
100
μ
s
t
RC(min)
Row cycle time
72.5
74
ns
1
t
CDL(min)
Last data in new col. Address delay
7.5
9.5
ns
2
t
RDL(min)
Last data in row precharge
15
15
ns
2
t
BDL(min)
Last data in to burst stop
7.5
9.5
ns
2
t
CCD(min)
Col. Address to col. Address delay
7.5
9.5
ns
Note:
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and
then rounding off to the next higher integer.
2. Minimum delay is required to complete write.
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