參數資料
型號: A1460A-CQ196E
元件分類: FPGA
英文描述: FPGA, 848 CLBS, 6000 GATES, 85 MHz, CQFP196
封裝: CAVITY-UP, CERAMIC, QFP-196
文件頁數: 2/98頁
文件大?。?/td> 2005K
代理商: A1460A-CQ196E
10
Ab s o l u t e Ma x i mu m R a t i n g s 1
Free air temperature range
Notes:
1.
Stresses beyond those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to
absolute maximum rated conditions for extended periods may
affect device reliability. Devices should not be operated outside
the recommended operating conditions.
2.
VPP = VCC , except during device programming.
3.
VSV = VCC , except during device programming.
4.
VKS = GND , except during device programming.
5.
Device inputs are normally high impedance and draw extremely
low current. However, when input voltage is greater than VCC +
0.5V or less than GND – 0.5V, the internal protection diode will be
forward biased and can draw excessive current.
Re com m e nde d Op er at i n g Co ndi t i on s
Notes:
1.
Ambient temperature (TA) is used for commercial and
industrial; case temperature (TC) is used for military.
2.
All power supplies must be in the recommended operating range.
For more information, refer to the Power-Up Design Considerations
application note at http://www.actel.com/appnotes.
E l e c tric a l S p e c ific a t io n s
Notes:
1.
Actel devices can drive and receive either CMOS or TTL signal levels. No assignment of I/Os as TTL or CMOS is required.
2.
Tested one output at a time, VCC = min.
3.
Not tested; for information only.
4.
VOUT = 0V, f = 1 MHz
Symbol
Parameter
Limits
Units
VCC
DC Supply Voltage2, 3, 4
–0.5 to +7.0
V
VI
Input Voltage
–0.5 to VCC +0.5
V
VO
Output Voltage
–0.5 to VCC +0.5
V
IIO
I/O Source Sink
Current5
±20
mA
TSTG
Storage Temperature
–65 to +150
°C
Parameter
Commercial
Military
Units
Temperature
Range1
0 to +70
–55 to +125
°C
Power Supply
Tolerance2
±5
±10
%VCC
Symbol
Parameter
Test Condition
Commercial
Military
Units
Min.
Max.
Min.
Max.
VOH
1, 2
HIGH Level Output
IOH = –4 mA (CMOS)
3.7
V
IOH = –6 mA (CMOS)
3.84
V
VOL
1, 2
LOW Level Output
IOL = +6 mA (CMOS)
0.33
0.4
V
VIH
HIGH Level Input
TTL Inputs
2.0
VCC + 0.3
2.0
VCC + 0.3
V
VIL
LOW Level Input
TTL Inputs
–0.3
0.8
–0.3
0.8
V
IIN
Input Leakage
VI = VCC or GND
–10
+10
–10
+10
A
IOZ
3-state Output Leakage
VO = VCC or GND
–10
+10
–10
+10
A
CIO
I/O Capacitance3, 4
10
pF
ICC(S)
Standby VCC Supply Current VI = VCC or GND, IO = 0 mA
ACT 1
3
20
mA
ACT 2/3/1200XL/3200DX
2
20
mA
ICC(D)
Dynamic VCC Supply Current
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