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| 型號(hào)： | 9S12XDP512DGV1 |
| 英文描述： | Device User Guide for Mask Set 0L40V ( First Silicon) |
| 中文描述： | 設(shè)備用戶指南掩模組0L40V（第一硅） |
| 文件頁(yè)數(shù)： | 74/152頁(yè) |
| 文件大小： | 1231K |
| 代理商： | 9S12XDP512DGV1 |
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MC9S12XDP512 Device User Guide — 9S12XDP512DGV1/D V01.12
74
2.3.11 PB0 / ADDR0 / UDS / IVD[0] — Port B I/O Pin
PB0 is a general purpose input or output pin. In MCU expanded modes of operation, this pin is used for
the external address bus ADDR0 or as upper data strobe signal. In MCU emulation modes of operation,
this pin is used for external address bus ADDR0 and internal visibility read data IVD0.
2.3.12 PC[7:0] / DATA [15:8] — Port C I/O Pins
PC7-PC0 are general purpose input or output pins. In MCU expanded modes of operation, these pins are
used for the external data bus.
The input voltage thresholds for PC[7:0] can be configured to reduced levels, to allow data from an
external 3.3V peripheral to be read by the MCU operating at 5.0V. The input voltage thresholds for
PC[7:0] are configured to reduced levels out of reset in expanded and emulation modes.
2.3.13 PD[7:0] / DATA [7:0] — Port D I/O Pins
PD7-PD0 are general purpose input or output pins. In MCU expanded modes of operation, these pins are
used for the external data bus.
The input voltage thresholds for PD[7:0] can be configured to reduced levels, to allow data from an
external 3.3V peripheral to be read by the MCU operating at 5.0V. The input voltage thresholds for
PD[7:0] are configured to reduced levels out of reset in expanded and emulation modes.
2.3.14 PE7 / ECLKX2 / XCLKS — Port E I/O Pin 7
PE7 is a general purpose input or output pin. The XCLKS is an input signal which controls whether a
crystal in combination with the internal loop controlled (low power) Pierce oscillator is used or whether
full swing Pierce oscillator/external clock circuitry is used.
The XCLKS pin selects the oscillator configuration during RESET low phase while a clock quality check
is ongoing. This is the case for:
Power on Reset or Low Voltage Reset
Clock Monitor Reset
Any Reset while in Self Clock Mode or Full Stop Mode
The selected oscillator configuration is frozen with the rising edge of RESET.
The pin can be configured to drive the internal system clock ECLKX2.
F
For More Information On This Product,
Go to: www.freescale.com
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 9S12XDP512DGV2 | Device User Guide for Mask Set L15Y - (Second Silicon - Enhanced Feature Set) |
| 9V3 | ELEMENT 10 MICRON E MEDIA |
| 6RS15 | Power-Supply Monitor with Reset |
| 6RS3 | Power-Supply Monitor with Reset |
| 6RS7 | ELEMENT 11.2 MICRON S MEDIA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9S12XDP512DGV2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Device User Guide for Mask Set L15Y - (Second Silicon - Enhanced Feature Set) |
| 9S-14.7456MEFA20-IND | 制造商:Hong Kong Crystal 功能描述:14.7456M,CRYSTAL 制造商:Hong Kong Crystal 功能描述:HC49US CRYSTALS METAL CAN 制造商:Hong Kong Crystal 功能描述:HC49USCRYSTALS METAL CAN |
| 9S-16MEFA22-IND | 制造商:Hong Kong Crystal 功能描述:16MHzAT-49US CRYSTALS METAL CAN |
| 9S-16MEFA30-IND | 制造商:Hong Kong Crystal 功能描述:HC49USCRYSTALS METAL CAN |
| 9S-18.432MEFA18-IND | 制造商:Hong Kong Crystal 功能描述:18.432MHz,crystals 制造商:Hong Kong Crystal 功能描述:HC49USCRYSTALS METAL CAN 制造商:Hong Kong Crystal 功能描述:HC49US CRYSTALS METAL CAN |
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