參數(shù)資料
型號(hào)： 9S12XDP512DGV1
英文描述： Device User Guide for Mask Set 0L40V ( First Silicon)
中文描述： 設(shè)備用戶指南掩模組0L40V（第一硅）
文件頁數(shù)： 138/152頁
文件大?。?/td> 1231K
代理商： 9S12XDP512DGV1
MC9S12XDP512 Device User Guide — V01.12
138
This is very important to notice with respect to timers, serial modules where a pre-scaler will eliminate the
effect of the jitter to a large extent.
Table A-19 PLL Characteristics
Conditions are shown in
Table A-4
unless otherwise noted
Num C
Rating
Symbol
Min
Typ
Max
Unit
1
P Self Clock Mode frequency
f
SCM
1
5.5
MHz
2
D VCO locking range
f
VCO
8
80
MHz
3
D
Lock Detector transition from Acquisition to Tracking
mode
|
trk
|
3
4
%
1
NOTES
:
1. % deviation from target frequency
2. f
osc
= 4MHz, f
BUS
= 40MHz equivalent f
VCO
= 80MHz: REFDV = #$00, SYNR = #$09, Cs = 1.0nF, Cp = 100pF, Rs = 10k
4
D Lock Detection
|
Lock
|
0
1.5
%
(1)
5
D Un-Lock Detection
|
unl
|
0.5
2.5
%
(1)
6
D
Lock Detector transition from Tracking to Acquisition
mode
|
unt
|
6
8
%
(1)
7
C PLLON Total Stabilization delay (Auto Mode)
2
t
stab
TBD
ms
8
D PLLON Acquisition mode stabilization delay
(2)
t
acq
TBD
ms
9
D PLLON Tracking mode stabilization delay
(2)
t
al
TBD
ms
10
D Fitting parameter VCO loop gain
K
1
-195
MHz/V
11
D Fitting parameter VCO loop frequency
f
1
126
MHz
12
D Charge pump current acquisition mode
| i
ch
|
38.5
μ
A
13
D Charge pump current tracking mode
| i
ch
|
3.5
μ
A
14
C Jitter fit parameter 1
(2)
j
1
TBD
%
15
C Jitter fit parameter 2
(2)
j
2
TBD
%
F
For More Information On This Product,
Go to: www.freescale.com
n
.
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