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Pinout and Signal Description
MC9S12T64Revision 1.1.1
74
Pinout and Signal Description
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MOTOROLA
Port Signals
TheMC9S12T64incorporatessevenportswhichareusedtocontroland
access the various device subsystems. When not used for these
purposes, port pins may be used for general-purpose I/O. In addition to
the pins described below, each port consists of a data register which can
be read and written at any time, and, with the exception of port AD and
PE[1:0], a data direction register which controls the direction of each pin.
After reset all general purpose I/O pins are configured as input.
Port A
Port A bits 7 through 0 are associated with address lines A15 through A8
respectively and data lines D15/D7 through D8/D0 respectively. When
this port is not used for external addresses such as in single-chip mode,
these pins can be used as general purpose I/O. Data Direction Register
A (DDRA) determines the primary direction of each pin. DDRA also
determines the source of data for a read of PORTA.
Register DDRAdetermineswhether eachport Apin is aninput oroutput.
DDRA is not in the address map during expanded and peripheral mode
operation. Setting a bit in DDRA makes the corresponding bit in port A
an output; clearing a bit in DDRA makes the corresponding bit in port A
an input. The default reset state of DDRA is all zeroes.
This register is not in the on-chip map in expanded and peripheral
modes.
Port B
Port B bits 7 through 0 are associated with address lines A7 through A0
respectively and data lines D7 through D0 respectively. When this port
is not used for external addresses, such as in single-chip mode, these
pins can be used as general purpose I/O. Data Direction Register B
(DDRB) determines the primary direction of each pin. DDRB also
determines the source of data for a read of PORTB.
Register DDRBdetermineswhether eachport Bpin is aninput oroutput.
DDRB is not in the address map during expanded and peripheral mode
operation. Setting a bit in DDRB makes the corresponding bit in port B
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