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參數(shù)資料
| 型號(hào)： | 933999360112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | FIFO |
| 英文描述： | 64 X 4 OTHER FIFO, 488 ns, PDIP16 |
| 封裝： | PLASTIC, SOT-38Z, DIP-16 |
| 文件頁(yè)數(shù)： | 4/19頁(yè) |
| 文件大?。?/td> | 125K |
| 代理商： | 933999360112 |
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September 1993
12
Philips Semiconductors
Product specication
4-Bit x 64-word FIFO register; 3-state
74HC/HCT7403
AC WAVEFORMS
Shifting in sequence FIFO empty to FIFO full
Notes to Fig.6
1. DIR initially HIGH; FIFO is prepared for valid data
2. SI set HIGH; data loaded into input stage
3. DIR goes LOW, input stage “busy”
4. SI set LOW; data from first location “ripple through”
5. DIR goes HIGH, status flag indicates FIFO prepared for additional data
6. Repeat process to load 2nd word through to 64th word into FIFO
DIR remains LOW; with attempt to shift into full FIFO, no data transfer occurs.
Fig.6
Waveforms showing the SI input to DIR output propagation delay, the SI pulse width and SI maximum
pulse frequency.
handbook, full pagewidth
MGA659
VM
(1)
1/f max
W
t
t PHL
t PLH
VM
(1)
1st word
2nd word
64th word
7
3
15
6
4
2
SI INPUT
Dn INPUT
DIR OUTPUT
(1) HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
相關(guān)PDF資料 |
PDF描述 |
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| 933999370118 | 64 X 4 OTHER FIFO, 488 ns, PDSO16 |
| 933999390118 | 64 X 4 OTHER FIFO, 108 ns, PDSO16 |
| 933999390112 | 64 X 4 OTHER FIFO, 108 ns, PDSO16 |
| 933999380112 | 64 X 4 OTHER FIFO, 108 ns, PDIP16 |
| 0579196702 | 0.5 mm2, BRASS, TIN FINISH, WIRE TERMINAL |
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