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參數(shù)資料
| 型號(hào)： | 78P2351-IGTR/F |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 40/42頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | LINE INTERFACE UNIT 100-LQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類(lèi)型： | 線路接口裝置（LIU） |
| 驅(qū)動(dòng)器/接收器數(shù)： | 1/1 |
| 規(guī)程： | E4，OC-3，STM1-E |
| 電源電壓： | 3.15 V ~ 3.45 V |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（16x16） |
| 包裝： | 帶卷 (TR) |
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78P2351
Single Channel
OC-3/ STM1-E/ E4 LIU
Page: 7 of 42
2006 Teridian Semiconductor Corporation
Rev. 2.4
Transmit Driver
In CMI (electrical) mode, the CMIP/N pins are biased
and terminated off-chip.
They interface to 75
coaxial cable through a 1:1 wideband transformer
and coaxial RF connectors. Reference application
notes for schematic and layout guidelines.
The transmitter encodes the data using CMI line
coding and shapes an analog signal to meet the
appropriate ITU-T G.703 template. The CMI outputs
are tri-stated during transmit disable and transmit
power-down for redundancy applications.
Note: To avoid reflections causing unwanted
board noise, it’s recommended to power-down
unused transmit ports that are not terminated
with cable to an Rx input port.
When the CMI pin is low, the chip is in Fiber (NRZ
pass-through) mode and interfaces directly to an
optical transceiver module. The ECLP/N pins are
internally biased and output NRZ data at LVPECL
levels. The CMI driver, encoder and decoder are
disabled in Fiber (NRZ) mode.
Transmit Monitor Mode
An optional redundant transmit output is available in
CMI mode for transmit monitoring. These outputs
(CMI2P/N) are enabled when the RCSL pin or RCSL
register bit is activated.
TDK
78P2351
RXP/N
CMIP/N
XFMR
CMI
Coax
CMI2P/N
XFMR
CMI
Coax
Figure 6: Transmit Monitor Output
Clock Synthesizer
The transmit clock synthesizer is a low-jitter DLL that
generates a 278.528/311.04 MHz clock for the CMI
encoder. It is also used in both the receive and
transmit sides for clock and data recovery.
Note: This 2x line rate clock is also available at
the
TXCKxP/N
pins
for
downstream
synchronization or system debug.
Transmit Backplane Equalizer
An optional fixed LVPECL equalizer is integrated in
the transmit path for architectures that use LIUs on
active interface cards.
The fixed equalizer can
compensate for up to 1.5m of trace and can be
enabled by the TXOUT1 pin or TXEQ bit as follows:
TXOUT1 pin
TXEQ bit
Tx Equalizer
Low
1
Enabled
Float
0
Disabled
Transmit Loss of Lock
In transmit modes using the integrated CDR, the
78P2351 will declare a loss of lock condition when
there is no valid signal detected at the SIDP/N data
inputs.
Note: The Tx LOL indicator is invalid and
undefined when the parallel (nibble) interface is
selected.
POWER-DOWN FUNCTION
Power-down control is provided to allow the
78P2351 to be shut off.
Transmit and receive
power-down can be set independently through SW
control.
Global power-down is achieved by
powering down both the transmitter and receiver.
Note: The serial interface and configuration
registers are not affected by power-down.
In HW mode, the transmitters can be powered down
using the TXPD control pin.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 78P2351R | 制造商:TERIDIAN 制造商全稱(chēng):TERIDIAN 功能描述:Serial 155M NRZ to CMI Converter |
| 78P2351R-DB | 功能描述:界面開(kāi)發(fā)工具 78P2351R Demo Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類(lèi)型:RS-485 工具用于評(píng)估:ADM3485E 接口類(lèi)型:RS-485 工作電源電壓:3.3 V |
| 78P2351R-IM | 制造商:TERIDIAN 制造商全稱(chēng):TERIDIAN 功能描述:Serial 155M NRZ to CMI Converter |
| 78P2351R-IM/F | 功能描述:接口 - 專(zhuān)用 Serial 155M NRZ to CMI Converter RoHS:否 制造商:Texas Instruments 產(chǎn)品類(lèi)型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| 78P2351R-IMR | 制造商:TERIDIAN 制造商全稱(chēng):TERIDIAN 功能描述:Serial 155M NRZ to CMI Converter |
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