參數(shù)資料
型號(hào): 72V805L15PFI9
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: FIFO
英文描述: 256 X 18 BI-DIRECTIONAL FIFO, 10 ns, PQFP128
封裝: TQFP-128
文件頁(yè)數(shù): 25/26頁(yè)
文件大小: 325K
代理商: 72V805L15PFI9
8
IDT72V805/72V815/72V825/72V835/72V845
3.3 V CMOS DUAL SyncFIFO 256 x 18, 512 x 18, 1,024 x 18, 4,096 x 18
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
Output Ready (
OR)
Input Ready (
IR)
Partial Flags
Programming at Reset
Flag Timing
FL
RXI
WXI
Diagrams
Triple
Double
Asynch
0
1
Figure 27
Triple
Double
Sync
1
0
1
Figure 20, 21
Empty Flag (
EF)
Full Flag (
FF)
Partial Flags
Programming at Reset
Flag Timing
Buffered Output
Timing Mode
FL
RXI
WXI
Diagrams
Single
Asynch
0
Figure 9, 10
Single
Sync
1
0
Figure 9, 10
Double
Asynch
0
1
0
Figure 24, 26
Double
Synch
1
0
Figure 24, 26
FL
RXI
WXI
EF/OR
FF/IR
PAE, PAF
FIFO TIMING MODE
0
Single Register-Buffered
Asynchronous
Standard
Empty Flag
Full Flag
0
1
Triple Register-Buffered
Double Register-Buffered
Asynchronous
FWFT
Output Ready Flag
Input Ready Flag
0
1
0
Double Register-Buffered
Asynchronous
Standard
Empty Flag
Full Flag
0(1)
1
Single Register-Buffered
Asynchronous
Standard
Empty Flag
Full Flag
1
0
Single Register-Buffered
Synchronous
Standard
Empty Flag
Full Flag
1
0
1
Triple Register-Buffered
Double Register-Buffered
Synchronous
FWFT
Output Ready Flag
Input Ready Flag
1
0
Double Register-Buffered
Synchronous
Standard
Empty Flag
Full Flag
1(2)
1
Single Register-Buffered
Asynchronous
Standard
Empty Flag
Full Flag
NOTES:
1. In a daisy-chain depth expansion,
FL is held LOW for the "first load device". The RXI and WXI inputs are driven by the corresponding RXO and WXO outputs of the preceding device.
2. In a daisy-chain depth expansion,
FL is held HIGH for members of the expansion other than the "first load device". The RXI and WXI inputs are driven by the corresponding RXO
and
WXO outputs of the preceding device.
TABLE 3 — TRUTH TABLE FOR CONFIGURATION AT RESET
TABLE 4 — REGISTER-BUFFERED FLAG OUTPUT OPTIONS — IDT STANDARD MODE
TABLE 5 — REGISTER-BUFFERED FLAG OUTPUT OPTIONS — FWFT MODE
相關(guān)PDF資料
PDF描述
72V805L15PF8 256 X 18 BI-DIRECTIONAL FIFO, 10 ns, PQFP128
7305-0-15-15-47-14-04-0 BRASS, GOLD FINISH, PCB TERMINAL
7305-0-15-15-47-01-04-0 BRASS, GOLD FINISH, PCB TERMINAL
7305-0-15-01-47-27-04-0 BRASS, TIN FINISH, PCB TERMINAL
7305-0-15-01-47-14-04-0 BRASS, TIN FINISH, PCB TERMINAL
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
72V805L20PF 功能描述:先進(jìn)先出 RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲(chǔ)容量:4 Mbit 定時(shí)類型:Synchronous 組織:256 K x 18 最大時(shí)鐘頻率:100 MHz 訪問(wèn)時(shí)間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝:
72V805L20PF8 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Quad Depth/Width Bi-Dir 256 x 18 x 2 128-Pin TQFP T/R 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC QUAD DEPTH/WIDTH BI-DIR 256 X 18 X 2 128TQFP - Tape and Reel
72V811L10PF 功能描述:先進(jìn)先出 RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲(chǔ)容量:4 Mbit 定時(shí)類型:Synchronous 組織:256 K x 18 最大時(shí)鐘頻率:100 MHz 訪問(wèn)時(shí)間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝:
72V811L10PF8 功能描述:先進(jìn)先出 RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲(chǔ)容量:4 Mbit 定時(shí)類型:Synchronous 組織:256 K x 18 最大時(shí)鐘頻率:100 MHz 訪問(wèn)時(shí)間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝:
72V811L10PF9 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Quad Depth/Width Bi-Dir 512 x 9 x 2 64-Pin TQFP