參數(shù)資料
型號: 723631L15PF9
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: FIFO
英文描述: 512 X 36 OTHER FIFO, 11 ns, PQFP120
封裝: TQFP-120
文件頁數(shù): 8/21頁
文件大?。?/td> 219K
代理商: 723631L15PF9
16
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
IDT723631/723641/723651 CMOS SyncFIFO
512 x 36, 1,024 x 36 and 2,048 x 36
Figure 9. Timing for
AE when FIFO is Almost-Empty
Figure 8. IR Flag Timing and First Available Write when the FIFO is Full
NOTE:
1. tSKEW1 is the minimum time between a rising CLKB edge and a rising CLKA edge for IR to transition HIGH in the next CLKA cycle. If the time between the rising CLKB edge
and rising CLKA edge is less than tSKEW1, then IR may transition HIGH one CLKA cycle later than shown.
NOTES:
1. tSKEW2 is the minimum time between a rising CLKA edge and a rising CLKB edge for
AE to transition HIGH in the next CLKB cycle. If the time between the rising CLKA edge
and rising CLKB edge is less than tSKEW2, then
AE may transition HIGH one CLKB cycle later than shown.
2. FIFO write (
CSA = LOW, W/RA = HIGH, MBA = LOW), FIFO read (CSB = LOW, W/RB = HIGH, MBB = LOW).
CSB
OR
W/RB
MBB
ENB
B0 -B35
CLKB
IR
CLKA
CSA
W/
RA
A0 - A35
MBA
ENA
3023 drw11
12
tCLK
tCLKH
tCLKL
tENS1
tENH1
tA
tSKEW1
tCLK
tCLKH
tCLKL
tPIR
tENS2
tENS1
tDS
tENH2
tENH1
tDH
Previous Word in FIFO Output Register
Next Word From FIFO
LOW
HIGH
LOW
HIGH
LOW
HIGH
(1)
FIFO Full
Write
AE
CLKA
ENB
ENA
CLKB
3023 drw12
2
1
tENS1
tENH1
tSKEW2
tPAE
tENS1
tENH1
X Word in FIFO
(X+1) Words in FIFO
(1)
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