參數(shù)資料
型號(hào)： 72235LB25JGI
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： FIFO
英文描述： 2K X 18 OTHER FIFO, 15 ns, PQCC68
封裝： GREEN, PLASTIC, LCC-68
文件頁數(shù)： 2/16頁
文件大?。?/td> 178K
代理商： 72235LB25JGI
10
IDT72205LB/72215LB/72225LB/72235LB/72245LB CMOS SyncFIFOTM
256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
OCTOBER 22, 2008
NOTES:
1. When tSKEW2 minimum specification, tFRL (maximum) = tCLK + tSKEW2. When tSKEW2 < minimum specification, tFRL (maximum) = either 2*tCLK + tSKEW2 or tCLK + tSKEW2.
The Latency Timing applies only at the Empty Boundary (
EF = LOW).
2. The first word is available the cycle after
EF goes HIGH, always.
Figure 7. First Data Word Latency after Reset with Simultaneous Read and Write
Figure 8. Full Flag Timing
WCLK
D0 - D17
RCLK
Q0 - Q17
t DS
tSKEW2
t ENS
t REF
tA
0
12
3
D
DDD
01
DD
(first valid write)
t OE
t OLZ
tA
tFRL(1)
D4
tENS
2766 drw 09
NOTE:
1. tSKEW1 is the minimum time between a rising RCLK edge and a rising WCLK edge to guarantee that
FF will go HIGH during the current clock cycle. If the time between the rising
edge of RCLK and the rising edge of WCLK is less than tSKEW1, then
FF may not change state until the next WCLK edge.
DATA READ
WCLK
D0 - D17
RCLK
Q0 - Q17
t A
t WFF
DATA WRITE
t WFF
t ENH
t ENS
t DS
t WFF
t DS
DATA
WRITE
NEXT DATA READ
t A
NO WRITE
DATA IN OUTPUT REGISTER
LOW
tSKEW1
(1)
t SKEW1
(1)
t ENH
t ENS
2766 drw 10
相關(guān)PDF資料
PDF描述
72225LB25TFG 1K X 18 OTHER FIFO, 15 ns, PQFP64
723-611/019-000 15 A, MODULAR TERMINAL BLOCK, 1 ROW, 1 DECK
72346-001LF 20 CONTACT(S), FEMALE, STRAIGHT TELECOM AND DATACOM CONNECTOR, SOLDER, RECEPTACLE
72346-001 20 CONTACT(S), FEMALE, STRAIGHT TELECOM AND DATACOM CONNECTOR, SOLDER, RECEPTACLE
72346-002LF 20 CONTACT(S), FEMALE, STRAIGHT TELECOM AND DATACOM CONNECTOR, SOLDER, RECEPTACLE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
72235LB25JI 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 2K x 18 68-Pin PLCC 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 2KX18 68PLCC - Rail/Tube
72235LB25JI8 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 2K x 18 68-Pin PLCC T/R 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 2KX18 68PLCC - Tape and Reel
72235LB25PF 功能描述:先進(jìn)先出 RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲(chǔ)容量:4 Mbit 定時(shí)類型:Synchronous 組織:256 K x 18 最大時(shí)鐘頻率:100 MHz 訪問時(shí)間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝:
72235LB25PF8 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 2K x 18 64-Pin TQFP T/R 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 2KX18 64TQFP - Tape and Reel
72235LB25PFG 制造商:Integrated Device Technology Inc 功能描述:FIFO SYNC DUAL DEPTH/WIDTH UNI-DIR 2KX18 64TQFP - Bulk
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*