參數(shù)資料
型號(hào)： 7026S55J8
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： SRAM
英文描述： 16K X 16 DUAL-PORT SRAM, 55 ns, PQCC84
封裝： PLASTIC, LCC-84
文件頁(yè)數(shù)： 8/18頁(yè)
文件大?。?/td> 272K
代理商： 7026S55J8
6.42
IDT7026S/L
High-Speed 16K x 16 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
16
inthenon-semaphoreportionoftheDual-PortRAM.Thesedeviceshave
anautomaticpower-downfeaturecontrolledbyCE,theDual-PortRAM
enable,andSEM,thesemaphoreenable.TheCEandSEMpinscontrol
on-chip power down circuitry that permits the respective port to go into
standbymodewhennotselected. Thisistheconditionwhichisshownin
Truth Table I where CE and SEM = VIH.
Systems which can best use the IDT7026 contain multiple proces-
sors or controllers and are typically very high-speed systems which
are software controlled or software intensive. These systems can
benefitfromaperformanceincreaseofferedbytheIDT7026'shardware
semaphores, which provide a lockout mechanism without requiring
complexprogramming.
Software handshaking between processors offers the maximum in
systemflexibilitybypermittingsharedresourcestobeallocatedinvarying
configurations.TheIDT7026doesnotuseitssemaphoreflagstocontrol
anyresourcesthroughhardware,thusallowingthesystemdesignertotal
flexibilityinsystemarchitecture.
An advantage of using semaphores rather than the more common
methodsofhardwarearbitrationisthatwaitstatesareneverincurredin
either processor. This can prove to be a major advantage in very high-
speedsystems.
How the Semaphore Flags Work
Thesemaphorelogicisasetofeightlatcheswhichareindependent
oftheDual-PortRAM.Theselatchescanbeusedtopassaflag,ortoken,
fromoneporttotheothertoindicatethatasharedresourceisinuse.The
semaphores provide a hardware assist for a use assignment method
called“TokenPassingAllocation.”Inthismethod,thestateofasemaphore
latchisusedasatokenindicatingthatsharedresourceisinuse.Iftheleft
processorwantstousethisresource,itrequeststhetokenbysettingthe
latch.Thisprocessorthenverifiesitssuccessinsettingthelatchbyreading
it. If it was successful, it proceeds to assume control over the shared
resource.Ifitwasnotsuccessfulinsettingthelatch,itdeterminesthatthe
rightsideprocessorhassetthelatchfirst, hasthetokenandisusingthe
sharedresource.Theleftprocessorcantheneitherrepeatedlyrequest
that semaphore’s status or remove its request for that semaphore to
performanothertaskandoccasionallyattemptagaintogaincontrolofthe
tokenviathesetandtestsequence.Oncetherightsidehasrelinquished
thetoken,theleftsideshouldsucceedingainingcontrol.
ThesemaphoreflagsareactiveLOW.Atokenisrequestedbywriting
azerointoasemaphorelatchandisreleasedwhenthesamesidewrites
aonetothatlatch.
The eight semaphore flags reside within the IDT7026 in a separate
memoryspacefromtheDual-PortRAM.This addressspaceisaccessed
byplacingaLOWinputontheSEMpin(whichactsasachipselectforthe
semaphore flags) and using the other control pins (Address, OE, and
R/W) as they would be used in accessing a standard Static RAM. Each
of the flags has a unique address which can be accessed by either side
throughaddresspinsA0–A2.Whenaccessingthesemaphores,noneof
the other address pins has any effect.
When writing to a semaphore, only data pin D0 is used. If a low level
iswrittenintoanunusedsemaphorelocation,thatflagwillbesettoazero
on that side and a one on the other side (see Table III). That semaphore
can now only be modified by the side showing the zero. When a one is
writtenintothesamelocationfromthesameside,theflagwillbesettoa
one for both sides (unless a semaphore request from the other side is
pending) and then can be written to by both sides. The fact that the side
whichisabletowriteazerointoasemaphoresubsequentlylocksoutwrites
fromtheothersideiswhatmakessemaphoreflagsusefulininterprocessor
communications.(Athoroughdiscussionontheuseofthisfeaturefollows
shortly.) A zero written into the same location from the other side will be
storedinthesemaphorerequestlatchforthatsideuntilthesemaphoreis
freed by the first side.
When a semaphore flag is read, its value is spread into all data bits
so that a flag that is a one reads as a one in all data bits and a flag
containing a zero reads as all zeros. The read value is latched into one
side’soutputregisterwhenthatside'ssemaphoreselect(SEM)andoutput
enable(OE)signalsgoactive.Thisservestodisallowthesemaphorefrom
changing state in the middle of a read cycle due to a write cycle from the
otherside.Becauseofthislatch,arepeatedreadofasemaphoreinatest
loopmustcauseeithersignal(SEMorOE)togoinactiveortheoutputwill
never change.
AsequenceWRITE/READmustbeusedbythesemaphoreinorder
to guarantee that no system level contention will occur. A processor
requestsaccesstosharedresourcesbyattemptingtowriteazerointoa
semaphorelocation.Ifthesemaphoreisalreadyinuse,thesemaphore
requestlatchwillcontainazero,yetthesemaphoreflagwillappearasone,
afactwhichtheprocessorwillverifybythesubsequentread(seeTable
III).Asanexample,assumeaprocessorwritesazerototheleftportata
freesemaphorelocation.Onasubsequentread,theprocessorwillverify
thatithaswrittensuccessfullytothatlocationandwillassumecontrolover
the resource in question. Meanwhile, if a processor on the right side
attempts to write a zero to the same semaphore flag it will fail, as will be
verifiedbythefactthataonewillbereadfromthatsemaphoreontheright
side during subsequent read. Had a sequence of READ/WRITE been
usedinstead,systemcontentionproblemscouldhaveoccurredduringthe
gap between the read and write cycles.
Itisimportanttonotethatafailedsemaphorerequestmustbefollowed
by either repeated reads or by writing a one into the same location. The
reasonforthisiseasilyunderstoodbylookingatthesimplelogicdiagram
ofthesemaphoreflaginFigure4.Twosemaphorerequestlatchesfeed
into a semaphore flag. Whichever latch is first to present a zero to the
semaphoreflagwillforceitssideofthesemaphoreflagLOWandtheother
side HIGH. This condition will continue until a one is written to the same
semaphorerequestlatch.Shouldtheotherside’ssemaphorerequestlatch
havebeenwrittentoazerointhemeantime,thesemaphoreflagwillflip
overtotheothersideassoonasaoneiswrittenintothefirstside’srequest
latch.Thesecondside’sflagwillnowstayLOWuntilitssemaphorerequest
latchiswrittentoaone.Fromthisitiseasytounderstandthat,ifasemaphore
is requested and the processor which requested it no longer needs the
resource, the entire system can hang up until a one is written into that
semaphorerequestlatch.
The critical case of semaphore timing is when both sides request a
single token by attempting to write a zero into it at the same time. The
semaphorelogicisspeciallydesignedtoresolvethisproblem.Ifsimulta-
neousrequestsaremade,thelogicguaranteesthatonlyonesidereceives
thetoken.Ifonesideisearlierthantheotherinmakingtherequest,thefirst
sidetomaketherequestwillreceivethetoken.Ifbothrequestsarriveat
the same time, the assignment will be arbitrarily made to one port or the
other.
One caution that should be noted when using semaphores is that
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