
Central Processor Unit (CPU)
Instruction Set Summary
MC68HC08AZ32A — Rev 1.0
Technical Data
MOTOROLA
Central Processor Unit (CPU)
For More Information On This Product,
Go to: www.freescale.com
85
6.8 Instruction Set Summary
Table 6-1
provides a summary of the M68HC08 instruction set.
Table 6-1. Instruction Set Summary
Source
Form
Operation
Description
Effect on
CCR
A
M
O
O
C
V H I N Z C
ADC #
opr
ADC
opr
ADC
opr
ADC
opr
,X
ADC
opr
,X
ADC ,X
ADC
opr
,SP
ADC
opr
,SP
Add with Carry
A
←
(A) + (M) + (C)
–
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
A9
B9
C9
D9
E9
F9
9E
E9
9E
D9
ii
dd
hh
ll
ee
ff
ff
ff
ee
ff
2
3
4
4
3
2
4
5
ADD #
opr
ADD
opr
ADD
opr
ADD
opr
,X
ADD
opr
,X
ADD ,X
ADD
opr
,SP
ADD
opr
,SP
Add without Carry
A
←
(A) + (M)
–
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
AB
BB
CB
DB
EB
FB
9E
EB
9E
DB
ii
dd
hh
ll
ee
ff
ff
ff
ee
ff
2
3
4
4
3
2
4
5
AIS #
opr
Add Immediate Value (Signed) to
SP
SP
←
(SP) + (16
M)
– – – – – – IMM
A7
ii
2
AIX #
opr
Add Immediate Value (Signed) to
H:X
H:X
←
(H:X) + (16
M)
– – – – – – IMM
AF
ii
2
AND #
opr
AND
opr
AND
opr
AND
opr
,X
AND
opr
,X
AND ,X
AND
opr
,SP
AND
opr
,SP
Logical AND
A
←
(A) & (M)
0 – –
–
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
A4
B4
C4
D4
E4
F4
9E
E4
9E
D4
ii
dd
hh
ll
ee
ff
ff
ff
ee
ff
2
3
4
4
3
2
4
5
ASL
opr
ASLA
ASLX
ASL
opr
,X
ASL ,X
ASL
opr
,SP
Arithmetic Shift Left
(Same as LSL)
– –
DIR
INH
INH
IX1
IX
SP1
38
48
58
68
78
9E
68
dd
ff
ff
4
1
1
4
3
5
ASR
opr
ASRA
ASRX
ASR
opr
,X
ASR
opr
,X
ASR
opr
,SP
Arithmetic Shift Right
– –
DIR
INH
INH
IX1
IX
SP1
37
47
57
67
77
9E
67
dd
ff
ff
4
1
1
4
3
5
C
b0
b7
0
b0
b7
C
F
Freescale Semiconductor, Inc.
n
.