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參數(shù)資料
| 型號： | 5962D1022901QXC |
| 元件分類： | DRAM |
| 英文描述： | 64M X 40 SYNCHRONOUS DRAM, 5.4 ns, CQFP128 |
| 封裝： | CERAMIC, QFP-128 |
| 文件頁數(shù)： | 33/68頁 |
| 文件大小： | 1475K |
| 代理商： | 5962D1022901QXC |
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39
Notes:
1. This table applies when CKEn - 1 was HIGH and CKEn is HIGH (see Table 7) and after tXSR has been met.
2. This table is bank-specific (except where noted) the current state is for a specific bank and the commands shown are those allowed to be issued to that bank when
in that state. Exceptions are covered in the notes below.
3. Current state definitions:
Idle: The bank has been precharged, and tRP has been met.
Row active: A row in the bank has been activated, and tRCD has been met. No data bursts/accesses and no register accesses are in progress.
Read: A READ burst has been initiated, with auto precharge disabled and has not yet terminated or been terminated.
Write: A WRITE burst has been initiated, with auto precharge disabled, and has not yet terminated or been terminated.
4. The following states must not be interrupted by a command issued to the same bank. COMMAND INHIBIT or NOP commands or allowable commands to the
other bank should be issued on any clock edge occurring during these states. Allowable commands to the other bank are determined by its current state and Table
7 and according to Table 8.
Precharging: Starts with registration of a PRECHARGE command and ends when tRP is met. After tRP is met, the bank will be in the idle state.
Row activating: Starts with registration of an ACTIVE command and ends when tRCD is met. After tRCD is met, the bank will be in the row active state.
Read with auto Starts with registration of a READ command with auto precharge enabled and ends when tRP has been met. After tRP is met, the bank
precharge enabled: will be in the idle state.
Write w/auto: Starts with registration of a WRITE command with auto precharge enabled and ends when tRP has been met. After tRP is met, the bank
precharge enabled: will be in the idle state.
5. The following states must not be interrupted by any executable command; COMMAND INHIBIT or NOP commands must be applied on each positive clock edge
during these states.
Refreshing: Starts with registration of an AUTO REFRESH command and ends when tRC is met. After tRC is met, the SDRAM will be in the al
banks idle state.
Accessing mode Starts with registration of a LOAD MODE REGISTER command and ends when tMRD has been met. After tMRD is met, the SDRAM
register: will be in the all banks idle state.
Precharging all: Starts with registration of a PRECHARGE ALL command and ends when tRP is met. After tRP is met, all banks will be in the idle state.
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks are idle.
8. May or may not be bank-specific; if all banks are to be precharged, all must be in a valid state for precharging.
9. Not bank-specific; BURST TERMINATE affects the most recent READ or WRITE burst, regardless of bank.
10. READs or WRITEs listed in the Command (Action) column include READs or WRITEs with auto precharge enabled and READs or WRITEs with auto
precharge disabled.
11. Does not affect the state of the bank and acts as a NOP to that bank.
Write
(auto
precharge
disabled)
L
H
L
H
READ (Select column and start READ burst)
10
L
H
L
WRITE (Select column and start new WRITE burst)
10
L
H
L
PRECHARGE (Truncate WRITE burst, start PRECHARGE)
8
L
H
L
BURST TERMINATE
9
Table 7: Truth Table 3 - Current State Bank n, Command to Bank n
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