參數(shù)資料
型號: 5962-9089907MYX
英文描述: V5 Series Miniature Basic Switch, Single Pole Double Throw Circuitry, 16 A at 250 Vac, Pin Plunger Actuator, 3,00 N [10.6 oz] Maximum Operating Force, Gold Contacts, Quick Connect Termination Silver Cadmium Oxide Contacts, Quick Connect Termination, CE, C
中文描述: 微電路,存儲器,DIGITAA型,CMOS,128K的× 8位閃存EEPROM存儲器,單片硅
文件頁數(shù): 21/27頁
文件大?。?/td> 207K
代理商: 5962-9089907MYX
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
SIZE
A
5962-90899
REVISION LEVEL
C
SHEET
21
DSCC FORM 2234
APR 97
c.
Subgroup 4 (C
design changIN
designated terminal and GND at a frequency of 1 MHz. Sample size is 15 devices with no failures and all input and
output terminals tested.
and C
measurements) shall be measured only for initial qualification and after any process or
d.
For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes Q and V,
subgroups 7 and 8 shall include verifying the functionality of the device; these tests shall have been fault graded in
accordance with MIL-STD-883, test method 5012 (see 1.5 herein).
e.
O/V (latch-up) tests shall be measured only for initial qualification and after any design or process changes which may
affect the performance of the device. For device class M, procedures and circuits shall be maintained under document
revision level control by the manufacturer and shall be made available to the preparing activity or acquiring activity
upon request. For device classes Q and V, the procedures and circuits shall be under the control of the device
manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the preparing activity or
acquiring activity upon request. Testing shall be on all pins, on five devices with zero failures. Latch-up test shall be
considered destructive. Information contained in JEDEC Standard EIA/JESD78 may be used for reference.
f. All devices selected for testing shall be programmed with a checkerboard pattern or equivalent. After completion of all
testing, the devices shall be erased and verified, (except devices submitted for groups B, C, and D testing).
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.2.1 Additional criteria for device class M.
a. Steady-state life test conditions, method 1005 of MIL-STD-883:
(1)
The device selected for testing shall be programmed with a checkerboard pattern. After completion of all testing,
the devices shall be erased and verified (except devices submitted for group D testing).
(2)
Test condition D or E. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test
method 1005.
(3)
TA
(
C, minimum.
(4)
Test duration: 1,000 hours, except as specified in method 1005 of MIL-STD-883.
b.
All devices requiring end-point electrical testing shall be programmed with a checkerboard or equivalent alternating bit
pattern.
c.
After the completion of all testing, the devices shall be cleared and verified prior to delivery.
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB, in accordance with
MIL-PRF-38535, and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of
MIL-STD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
The devices selected for testing shall be programmed with a checkerboard pattern. After completion of all testing, the devices
shall be erased and verified.
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