參數(shù)資料
型號： 5962-9089907MYX
英文描述： V5 Series Miniature Basic Switch, Single Pole Double Throw Circuitry, 16 A at 250 Vac, Pin Plunger Actuator, 3,00 N [10.6 oz] Maximum Operating Force, Gold Contacts, Quick Connect Termination Silver Cadmium Oxide Contacts, Quick Connect Termination, CE, C
中文描述： 微電路，存儲器，DIGITAA型，CMOS，128K的× 8位閃存EEPROM存儲器，單片硅
文件頁數(shù)： 16/27頁
文件大?。?/td> 207K
代理商： 5962-9089907MYX
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
SIZE
A
5962-90899
REVISION LEVEL
C
SHEET
16
DSCC FORM 2234
APR 97
Command definitions, device types 01-09
Command
BUS
cycles
required
First BUS cycle
Second BUS cycle
Operation
1/
Write
Write
Write
Write
Write
Write
Write
Address
2/
X
X
X
EA
X
X
X
Data
3/
00H/FFH
90H/80H
20H
A0H
40H
C0H
FFH
Operation
1/
Read
Read
Write
Read
Write
Read
Write
Address
2/
RA
IA
X
X
PA
X
X
Data
3/
RD
ID
20H
EVD
PD
PVD
FFH
Read memory
Read auto select codes 4/
Setup erase/erase
Erase verify
Setup program/program
Program verify
Reset 5/
1
2
2
2
2
2
2
1/
2/
Refer to BUS operations for definitions.
RA = Address of the memory location to be read.
IA = Identifier address: 00H/01H for manufacturer code, 01H/A7H for device code.
EA = Address of memory location to be read during erase verify.
PA = Address of memory location to be programmed.
Address are latched on the falling edge of the write-enable pulse.
RD = Data read from location RA during read operation.
ID = Data read from location IA during device identification.
EVD = Data read from location EA during erase verify.
PD = Data to be programmed at location PA. Data is latched on the rising edge of write-enable.
PVD = Data read from location PA during program verify. PA is latched on the program command.
Following the read Auto Select code ID command, two read operations access manufacturer and device codes.
The second bus cycle must be followed by the desired command register write.
3/
4/
5/
Command definitions, device types 10-13
Command
BUS
cycles
required
First BUS cycle
Second BUS cycle
Operation
1/
Write
Write
Write
Write
Address
2/
X
X
X
X
Data
3/
00H/FFH
80H/90H
30H
10H/50H
Operation
1/
Read
Read
Write
Write
Address
2/
RA
00H/01H 01H/A2H
X
PA
Data
3/
RD
Read memory
Read auto select codes 4/
Embedded erase setup/erase
Embedded program
setup/program
Reset 5/
1
3
2
2
30H
PD
2
Write
X
FFH
Write
X
FFH
1/
2/
Refer to BUS operations for definitions.
RA = Address of the memory location to be read.
PA = Address of memory location to be programmed.
Address are latched on the falling edge of the
WE
pulse.
RD = Data read from location RA during read operation.
PD = Data to be programmed at location PA. Data is latched on the rising edge of
WE
.
Following the read Auto Select code ID command, two read operations access manufacturer and device codes.
The second bus cycle must be followed by the desired command register write.
3/
4/
5/
FIGURE 3. Truth tables - Continued.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
5962-9089909MUA 制造商:Rochester Electronics LLC 功能描述:- Bulk
5962-9089909MYA 制造商:Rochester Electronics LLC 功能描述:- Bulk
5962-9090102M3A 制造商:Integrated Device Technology Inc 功能描述:5962-9090102M3A - Rail/Tube
5962-9090102MLA 制造商:Integrated Device Technology Inc 功能描述:
5962-9090501M2A 制造商:Rochester Electronics LLC 功能描述:- Bulk
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