![](http://datasheet.mmic.net.cn/290000/2SK3589-01_datasheet_16119414/2SK3589-01_1.png)
1
2 S1 : Source1
3 S2 : Source2
4 D : Drain
S1
Fig.1
Fig.1
Note:1. reference values.
Special
specification
for customer
Trademark
Lot No.
Type name
S2
MARKING
OUT VIEW
Outline Drawings
(mm)
DIMENSIONS ARE IN MILLIMETERS.
MARKING
CONNECTION
Item
Drain-source voltage
Symbol
V
DS
V
DSX *5
I
D
Ratings
Unit
V
V
A
A
A
V
A
mJ
kV/μs
kV/μs
W
W
°C
°C
100
70
±50
±6.9 **
±200
±30
50
465
20
5
123
2.4
+150
-55 to +150
Continuous drain current
Pulsed drain current
Gate-source voltage
Non-repetitive Avalanche current
Maximum Avalanche Energy
Maximum Drain-Source dV/dt
Peak Diode Recovery dV/dt
Max. power dissipation
I
D(puls]
V
GS
I
AS *2
E
AS *1
dV
DS
/dt
*4
dV/dt
*3
P
D
Tc=25°C
Ta=25°C
T
ch
T
stg
Operating and storage
temperature range
** Surface mounted on 1000mm
2
, t=1.6mm FR-4 PCB(Drain pad area : 500mm
2
)
Electrical characteristics (T
c
=25°C unless otherwise specified)
Thermalcharacteristics
Item Symbol Test Conditions
2SK3589-01
FUJI POWER MOSFET
Super FAP-G Series
N-CHANNEL SILICON POWER MOSFET
Features
High speed switching
Low on-resistance
No secondary breadown
Low driving power
Avalanche-proof
Applications
Switching regulators
UPS (Uninterruptible Power Supply)
DC-DC converters
Maximum ratings and characteristic
Absolute maximum ratings
(Tc=25°C unless otherwise specified)
Zero gate voltage drain current I
DSS
DS
=100V V
GS
=0V
DS
=80V V
GS
=0V
V
GS
=±30V
I
D
=25A V
GS
=10V
I
D
=25A V
DS
=25V
V
DS
=75V
V
GS
=0V
f=1MHz
V
CC
=48V I
D
=
25A
V
GS
=10V
R
GS
=10
Min. Typ. Max. Units
100
3.0
V
V
μA
nA
m
S
pF
nC
A
V
μs
μC
ns
Min. Typ. Max. Units
Thermal resistance
0.93
87.0
52.0
°C/W
°C/W
°C/W
Symbol
V
(BR)DSS
V
GS(th)
I
GSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
td
(on)
t
r
td
(off)
t
f
Q
G
Q
GS
Q
GD
I
AV
V
SD
t
rr
Q
rr
Item
Drain-source breakdown voltaget
Gate threshold voltage
Gate-source leakage current
Drain-source on-state resistance
Forward transcondutance
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on time t
on
Turn-off time t
off
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Avalanche capability
Diode forward on-voltage
Reverse recovery time
Reverse recovery charge
Test Conditions
I
D
= 250μA V
GS
=0V
I
D
= 250μA V
DS
=V
GS
V
ch
=25°C
V
ch
=125°C
DS
=0V
V
CC
=50V
I
D
=50A
V
GS
=10V
L=100
μ
H T
ch
=25°C
I
F
=50A V
GS
=0V T
ch
=25°C
I
F
=50A V
GS
=0V
-di/dt=100A/μs T
ch
=25°C
5.0
25
250
100
25
10
19
25
19
1830
460
2745
690
38
20
35
50
23
52
16
18
57
30
53
75
35
78
24
27
50
1.10
0.1
0.4
1.65
Equivalent circuit schematic
*3 I
F
-I
D
, -di/dt=50A/μs, Vcc=
DSS
, Tch=
=
*1 L=223μH, Vcc=48V *2 Tch=
*4 V
DS
<
www.fujielectric.co.jp/denshi/scd
*5 V
GS
=-30V
Tc=25°C
Ta=25°C
R
th(ch-c)
channel to case
R
th(ch-a)
channel to ambient
R
th(ch-a) **
channel to ambient
** Surface mounted on 1000mm
2
, t=1.6mm FR-4 PCB(Drain pad area : 500mm
2
)
G : Gate
S2 : Source
D : Drain
S1 : Source