參數(shù)資料
型號: 28222-13
廠商: Conexant Systems, Inc.
英文描述: ATM Transmitter/Receiver with UTOPIA Interface
中文描述: 自動柜員機(jī)發(fā)射機(jī)/接收機(jī)的UTOPIA接口
文件頁數(shù): 20/161頁
文件大?。?/td> 1832K
代理商: 28222-13
UTOPIA port with four-cell buffer
Port rate and priority control
Idle cell TX/Rx
Per-port ATM header screening
48-, 52-, 53-, and 57-octet cell modes
1.0 Product Description
CN8223
1.5 FIFO Port/UTOPIA Interface
ATM Transmitter/Receiver with UTOPIA Interface
1-10
Conexant
100046C
1.5 FIFO Port/UTOPIA Interface
The CN8223 FIFO Port/UTOPIA interface is the data connection for the host
system.
Figure 1-4
illustrates the functions in this block. This block has two
modes for interfacing with ATM cells: four FIFO ports or one ATM Forum Level
1 Compliant UTOPIA port.
FIFO port/UTOPIA interface block features include the following:
Four byte-wide FIFO ports
1.5.1 UTOPIA Mode
UTOPIA mode implements a single 25 MHz, 8-bit plus parity bidirectional
interface with four cells of internal FIFO in both directions. Parity is optional.
When the UTOPIA interface mode is used, only 53-octet output is available.
1.5.2 FIFO Ports
Cells are routed to one of four output ports if a match to that port
s programmable
header value is made. This can be used to route received VCI/VPIs to a chosen
port. Four modes are available for FIFO port cell output:
A test mode writes the entire 57-octet PLCP slot to the FIFO interface.
A 53-octet mode writes the 53-octet ATM cell to the FIFO interface.
A 52-octet mode writes the ATM cell without the HEC octet to the FIFO
interface.
A final mode delivers 48-octet cell payloads to the FIFO interface.
Figure 1-4. FIFO Port/UTOPIA Interface Block
Port 1 Ctrl
Port 2 Ctrl
Port 3 Ctrl
UTOPIA Ctrl
Port 0 Ctrl
Rx VPI/VCI
Screening
4-Port
FIFO
Data
Interface
9
9
FDAT_IN
FDAT_OUT
FCTRL_OUT[16:0]
FCTRL_IN[7:0]
UTOPIA
Interface
and
4-Cell
Buffers
ATM Cell
Processing
Block
ATM Layer
Cell Processing
FIFO
8
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